sfc: Implement message level control
Replace EFX_ERR() with netif_err(), EFX_INFO() with netif_info(), EFX_LOG() with netif_dbg() and EFX_TRACE() and EFX_REGDUMP() with netif_vdbg(). Replace EFX_ERR_RL(), EFX_INFO_RL() and EFX_LOG_RL() using explicit calls to net_ratelimit(). Implement the ethtool operations to get and set message level flags, and add a 'debug' module parameter for the initial value. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:

committed by
David S. Miller

parent
0c605a2061
commit
62776d034c
@@ -78,8 +78,9 @@ static inline void efx_writeo(struct efx_nic *efx, efx_oword_t *value,
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{
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unsigned long flags __attribute__ ((unused));
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EFX_REGDUMP(efx, "writing register %x with " EFX_OWORD_FMT "\n", reg,
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EFX_OWORD_VAL(*value));
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netif_vdbg(efx, hw, efx->net_dev,
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"writing register %x with " EFX_OWORD_FMT "\n", reg,
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EFX_OWORD_VAL(*value));
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spin_lock_irqsave(&efx->biu_lock, flags);
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#ifdef EFX_USE_QWORD_IO
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@@ -105,8 +106,9 @@ static inline void efx_sram_writeq(struct efx_nic *efx, void __iomem *membase,
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unsigned int addr = index * sizeof(*value);
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unsigned long flags __attribute__ ((unused));
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EFX_REGDUMP(efx, "writing SRAM address %x with " EFX_QWORD_FMT "\n",
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addr, EFX_QWORD_VAL(*value));
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netif_vdbg(efx, hw, efx->net_dev,
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"writing SRAM address %x with " EFX_QWORD_FMT "\n",
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addr, EFX_QWORD_VAL(*value));
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spin_lock_irqsave(&efx->biu_lock, flags);
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#ifdef EFX_USE_QWORD_IO
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@@ -129,8 +131,9 @@ static inline void efx_sram_writeq(struct efx_nic *efx, void __iomem *membase,
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static inline void efx_writed(struct efx_nic *efx, efx_dword_t *value,
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unsigned int reg)
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{
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EFX_REGDUMP(efx, "writing partial register %x with "EFX_DWORD_FMT"\n",
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reg, EFX_DWORD_VAL(*value));
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netif_vdbg(efx, hw, efx->net_dev,
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"writing partial register %x with "EFX_DWORD_FMT"\n",
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reg, EFX_DWORD_VAL(*value));
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/* No lock required */
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_efx_writed(efx, value->u32[0], reg);
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@@ -155,8 +158,9 @@ static inline void efx_reado(struct efx_nic *efx, efx_oword_t *value,
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value->u32[3] = _efx_readd(efx, reg + 12);
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spin_unlock_irqrestore(&efx->biu_lock, flags);
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EFX_REGDUMP(efx, "read from register %x, got " EFX_OWORD_FMT "\n", reg,
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EFX_OWORD_VAL(*value));
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netif_vdbg(efx, hw, efx->net_dev,
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"read from register %x, got " EFX_OWORD_FMT "\n", reg,
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EFX_OWORD_VAL(*value));
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}
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/* Read an 8-byte SRAM entry through supplied mapping,
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@@ -177,8 +181,9 @@ static inline void efx_sram_readq(struct efx_nic *efx, void __iomem *membase,
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#endif
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spin_unlock_irqrestore(&efx->biu_lock, flags);
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EFX_REGDUMP(efx, "read from SRAM address %x, got "EFX_QWORD_FMT"\n",
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addr, EFX_QWORD_VAL(*value));
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netif_vdbg(efx, hw, efx->net_dev,
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"read from SRAM address %x, got "EFX_QWORD_FMT"\n",
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addr, EFX_QWORD_VAL(*value));
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}
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/* Read dword from register that allows partial writes (sic) */
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@@ -186,8 +191,9 @@ static inline void efx_readd(struct efx_nic *efx, efx_dword_t *value,
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unsigned int reg)
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{
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value->u32[0] = _efx_readd(efx, reg);
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EFX_REGDUMP(efx, "read from register %x, got "EFX_DWORD_FMT"\n",
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reg, EFX_DWORD_VAL(*value));
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netif_vdbg(efx, hw, efx->net_dev,
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"read from register %x, got "EFX_DWORD_FMT"\n",
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reg, EFX_DWORD_VAL(*value));
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}
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/* Write to a register forming part of a table */
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