ARM: tegra: migrate to new clock code
Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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کامیت شده توسط
Stephen Warren

والد
b08e8c0ecc
کامیت
61fd290d21
@@ -42,7 +42,6 @@
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#include <asm/setup.h>
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#include "board.h"
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#include "clock.h"
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#include "common.h"
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#include "iomap.h"
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@@ -104,37 +103,8 @@ static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
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{}
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};
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static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
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/* name parent rate enabled */
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{ "uarta", "pll_p", 216000000, true },
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{ "uartd", "pll_p", 216000000, true },
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{ "usbd", "clk_m", 12000000, false },
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{ "usb2", "clk_m", 12000000, false },
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{ "usb3", "clk_m", 12000000, false },
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{ "pll_a", "pll_p_out1", 56448000, true },
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{ "pll_a_out0", "pll_a", 11289600, true },
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{ "cdev1", NULL, 0, true },
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{ "blink", "clk_32k", 32768, true },
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{ "i2s1", "pll_a_out0", 11289600, false},
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{ "i2s2", "pll_a_out0", 11289600, false},
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{ "sdmmc1", "pll_p", 48000000, false},
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{ "sdmmc3", "pll_p", 48000000, false},
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{ "sdmmc4", "pll_p", 48000000, false},
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{ "spi", "pll_p", 20000000, false },
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{ "sbc1", "pll_p", 100000000, false },
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{ "sbc2", "pll_p", 100000000, false },
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{ "sbc3", "pll_p", 100000000, false },
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{ "sbc4", "pll_p", 100000000, false },
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{ "host1x", "pll_c", 150000000, false },
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{ "disp1", "pll_p", 600000000, false },
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{ "disp2", "pll_p", 600000000, false },
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{ NULL, NULL, 0, 0},
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};
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static void __init tegra_dt_init(void)
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{
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tegra_clk_init_from_table(tegra_dt_clk_init_table);
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/*
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* Finished with the static registrations now; fill in the missing
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* devices
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