arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support
A new feature of SMCCC 1.1 is that it offers firmware-based CPU workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides BP hardening for CVE-2017-5715. If the host has some mitigation for this issue, report that we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the host workaround on every guest exit. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Catalin Marinas

parent
a4097b3511
commit
6167ec5c91
@@ -405,13 +405,20 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
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{
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u32 func_id = smccc_get_function(vcpu);
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u32 val = PSCI_RET_NOT_SUPPORTED;
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u32 feature;
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switch (func_id) {
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case ARM_SMCCC_VERSION_FUNC_ID:
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val = ARM_SMCCC_VERSION_1_1;
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break;
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case ARM_SMCCC_ARCH_FEATURES_FUNC_ID:
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/* Nothing supported yet */
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feature = smccc_get_arg1(vcpu);
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switch(feature) {
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case ARM_SMCCC_ARCH_WORKAROUND_1:
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if (kvm_arm_harden_branch_predictor())
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val = 0;
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break;
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}
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break;
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default:
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return kvm_psci_call(vcpu);
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