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Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

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Pull ARM soc general cleanups from Olof Johansson:
 "This is a large branch that contains a handful of different cleanups:

   - Fixing up the I/O space remapping on PCI on ARM.  This is a series
     from Rob Herring that restructures how all pci devices allocate I/O
     space, and it's part of the work to allow multiplatform kernels.
   - A number of cleanup series for OMAP, moving and removing some
     headers, sparse irq rework and in general preparation for
     multiplatform.
   - Final removal of all non-DT boards for Tegra, it is now
     device-tree-only!
   - Removal of a stale platform, nxp4008.  It's an old mobile chipset
     that is no longer in use, and was very likely never really used
     with a mainline kernel.  We have not been able to find anyone
     interested in keeping it around in the kernel.
   - Removal of the legacy dmaengine driver on tegra

  + A handful of other things that I haven't described above."

Fix up some conflicts with the staging tree (and because nxp4008 was
removed)

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (184 commits)
  ARM: OMAP2+: serial: Change MAX_HSUART_PORTS to 6
  ARM: OMAP4: twl-common: Support for additional devices on i2c1 bus
  ARM: mmp: using for_each_set_bit to simplify the code
  ARM: tegra: harmony: fix ldo7 regulator-name
  ARM: OMAP2+: Make omap4-keypad.h local
  ARM: OMAP2+: Make l4_3xxx.h local
  ARM: OMAP2+: Make l4_2xxx.h local
  ARM: OMAP2+: Make l3_3xxx.h local
  ARM: OMAP2+: Make l3_2xxx.h local
  ARM: OMAP1: Move irda.h from plat to mach
  ARM: OMAP2+: Make hdq1w.h local
  ARM: OMAP2+: Make gpmc-smsc911x.h local
  ARM: OMAP2+: Make gpmc-smc91x.h local
  ARM: OMAP1: Move flash.h from plat to mach
  ARM: OMAP2+: Make debug-devices.h local
  ARM: OMAP1: Move board-voiceblue.h from plat to mach
  ARM: OMAP1: Move board-sx1.h from plat to mach
  ARM: OMAP2+: Make omap-wakeupgen.h local
  ARM: OMAP2+: Make omap-secure.h local
  ARM: OMAP2+: Make ctrl_module_wkup_44xx.h local
  ...
This commit is contained in:
Linus Torvalds
2012-10-01 18:19:05 -07:00
parent 47061eda25 9cf1c87152
commit 61464c8357
623 changed files with 4617 additions and 15489 deletions
Download Patch File Download Diff File Expand all files Collapse all files

95
arch/arm/mach-tegra/pcie.c
View File

@@ -171,8 +171,6 @@ static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
* 0x90000000 - 0x9fffffff - non-prefetchable memory
* 0xa0000000 - 0xbfffffff - prefetchable memory
*/
#define TEGRA_PCIE_BASE 0x80000000
#define PCIE_REGS_SZ SZ_16K
#define PCIE_CFG_OFF PCIE_REGS_SZ
#define PCIE_CFG_SZ SZ_1M
@@ -180,8 +178,6 @@ static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
#define PCIE_EXT_CFG_SZ SZ_1M
#define PCIE_IOMAP_SZ (PCIE_REGS_SZ + PCIE_CFG_SZ + PCIE_EXT_CFG_SZ)
#define MMIO_BASE (TEGRA_PCIE_BASE + SZ_4M)
#define MMIO_SIZE SZ_64K
#define MEM_BASE_0 (TEGRA_PCIE_BASE + SZ_256M)
#define MEM_SIZE_0 SZ_128M
#define MEM_BASE_1 (MEM_BASE_0 + MEM_SIZE_0)
@@ -204,10 +200,9 @@ struct tegra_pcie_port {
bool link_up;
char io_space_name[16];
char mem_space_name[16];
char prefetch_space_name[20];
struct resource res[3];
struct resource res[2];
};
struct tegra_pcie_info {
@@ -223,17 +218,7 @@ struct tegra_pcie_info {
struct clk *pll_e;
};
static struct tegra_pcie_info tegra_pcie = {
.res_mmio = {
.name = "PCI IO",
.start = MMIO_BASE,
.end = MMIO_BASE + MMIO_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
void __iomem *tegra_pcie_io_base;
EXPORT_SYMBOL(tegra_pcie_io_base);
static struct tegra_pcie_info tegra_pcie;
static inline void afi_writel(u32 value, unsigned long offset)
{
@@ -381,24 +366,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
pp = tegra_pcie.port + nr;
pp->root_bus_nr = sys->busnr;
/*
* IORESOURCE_IO
*/
snprintf(pp->io_space_name, sizeof(pp->io_space_name),
"PCIe %d I/O", pp->index);
pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0;
pp->res[0].name = pp->io_space_name;
if (pp->index == 0) {
pp->res[0].start = PCIBIOS_MIN_IO;
pp->res[0].end = pp->res[0].start + SZ_32K - 1;
} else {
pp->res[0].start = PCIBIOS_MIN_IO + SZ_32K;
pp->res[0].end = IO_SPACE_LIMIT;
}
pp->res[0].flags = IORESOURCE_IO;
if (request_resource(&ioport_resource, &pp->res[0]))
panic("Request PCIe IO resource failed\n");
pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
pci_ioremap_io(nr * SZ_64K, TEGRA_PCIE_IO_BASE);
/*
* IORESOURCE_MEM
@@ -406,18 +374,18 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
snprintf(pp->mem_space_name, sizeof(pp->mem_space_name),
"PCIe %d MEM", pp->index);
pp->mem_space_name[sizeof(pp->mem_space_name) - 1] = 0;
pp->res[1].name = pp->mem_space_name;
pp->res[0].name = pp->mem_space_name;
if (pp->index == 0) {
pp->res[1].start = MEM_BASE_0;
pp->res[1].end = pp->res[1].start + MEM_SIZE_0 - 1;
pp->res[0].start = MEM_BASE_0;
pp->res[0].end = pp->res[0].start + MEM_SIZE_0 - 1;
} else {
pp->res[1].start = MEM_BASE_1;
pp->res[1].end = pp->res[1].start + MEM_SIZE_1 - 1;
pp->res[0].start = MEM_BASE_1;
pp->res[0].end = pp->res[0].start + MEM_SIZE_1 - 1;
}
pp->res[1].flags = IORESOURCE_MEM;
if (request_resource(&iomem_resource, &pp->res[1]))
pp->res[0].flags = IORESOURCE_MEM;
if (request_resource(&iomem_resource, &pp->res[0]))
panic("Request PCIe Memory resource failed\n");
pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
pci_add_resource_offset(&sys->resources, &pp->res[0], sys->mem_offset);
/*
* IORESOURCE_MEM | IORESOURCE_PREFETCH
@@ -425,18 +393,18 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
snprintf(pp->prefetch_space_name, sizeof(pp->prefetch_space_name),
"PCIe %d PREFETCH MEM", pp->index);
pp->prefetch_space_name[sizeof(pp->prefetch_space_name) - 1] = 0;
pp->res[2].name = pp->prefetch_space_name;
pp->res[1].name = pp->prefetch_space_name;
if (pp->index == 0) {
pp->res[2].start = PREFETCH_MEM_BASE_0;
pp->res[2].end = pp->res[2].start + PREFETCH_MEM_SIZE_0 - 1;
pp->res[1].start = PREFETCH_MEM_BASE_0;
pp->res[1].end = pp->res[1].start + PREFETCH_MEM_SIZE_0 - 1;
} else {
pp->res[2].start = PREFETCH_MEM_BASE_1;
pp->res[2].end = pp->res[2].start + PREFETCH_MEM_SIZE_1 - 1;
pp->res[1].start = PREFETCH_MEM_BASE_1;
pp->res[1].end = pp->res[1].start + PREFETCH_MEM_SIZE_1 - 1;
}
pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
if (request_resource(&iomem_resource, &pp->res[2]))
pp->res[1].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
if (request_resource(&iomem_resource, &pp->res[1]))
panic("Request PCIe Prefetch Memory resource failed\n");
pci_add_resource_offset(&sys->resources, &pp->res[2], sys->mem_offset);
pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
return 1;
}
@@ -531,8 +499,8 @@ static void tegra_pcie_setup_translations(void)
/* Bar 2: downstream IO bar */
fpci_bar = ((__u32)0xfdfc << 16);
size = MMIO_SIZE;
axi_address = MMIO_BASE;
size = SZ_128K;
axi_address = TEGRA_PCIE_IO_BASE;
afi_writel(axi_address, AFI_AXI_BAR2_START);
afi_writel(size >> 12, AFI_AXI_BAR2_SZ);
afi_writel(fpci_bar, AFI_FPCI_BAR2);
@@ -766,7 +734,6 @@ static void tegra_pcie_clocks_put(void)
static int __init tegra_pcie_get_resources(void)
{
struct resource *res_mmio = &tegra_pcie.res_mmio;
int err;
err = tegra_pcie_clocks_get();
@@ -788,34 +755,16 @@ static int __init tegra_pcie_get_resources(void)
goto err_map_reg;
}
err = request_resource(&iomem_resource, res_mmio);
if (err) {
pr_err("PCIE: Failed to request resources: %d\n", err);
goto err_req_io;
}
tegra_pcie_io_base = ioremap_nocache(res_mmio->start,
resource_size(res_mmio));
if (tegra_pcie_io_base == NULL) {
pr_err("PCIE: Failed to map IO\n");
err = -ENOMEM;
goto err_map_io;
}
err = request_irq(INT_PCIE_INTR, tegra_pcie_isr,
IRQF_SHARED, "PCIE", &tegra_pcie);
if (err) {
pr_err("PCIE: Failed to register IRQ: %d\n", err);
goto err_irq;
goto err_req_io;
}
set_irq_flags(INT_PCIE_INTR, IRQF_VALID);
return 0;
err_irq:
iounmap(tegra_pcie_io_base);
err_map_io:
release_resource(&tegra_pcie.res_mmio);
err_req_io:
iounmap(tegra_pcie.regs);
err_map_reg: