sched/deadline: Improve admission control for asymmetric CPU capacities
The current SCHED_DEADLINE (DL) admission control ensures that sum of reserved CPU bandwidth < x * M where x = /proc/sys/kernel/sched_rt_{runtime,period}_us M = # CPUs in root domain. DL admission control works well for homogeneous systems where the capacity of all CPUs are equal (1024). I.e. bounded tardiness for DL and non-starvation of non-DL tasks is guaranteed. But on heterogeneous systems where capacity of CPUs are different it could fail by over-allocating CPU time on smaller capacity CPUs. On an Arm big.LITTLE/DynamIQ system DL tasks can easily starve other tasks making it unusable. Fix this by explicitly considering the CPU capacity in the DL admission test by replacing M with the root domain CPU capacity sum. Signed-off-by: Luca Abeni <luca.abeni@santannapisa.it> Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Juri Lelli <juri.lelli@redhat.com> Link: https://lkml.kernel.org/r/20200520134243.19352-4-dietmar.eggemann@arm.com
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Peter Zijlstra

parent
fc9dc69847
commit
60ffd5edc5
@@ -310,11 +310,11 @@ void __dl_add(struct dl_bw *dl_b, u64 tsk_bw, int cpus)
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__dl_update(dl_b, -((s32)tsk_bw / cpus));
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}
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static inline
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bool __dl_overflow(struct dl_bw *dl_b, int cpus, u64 old_bw, u64 new_bw)
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static inline bool __dl_overflow(struct dl_bw *dl_b, unsigned long cap,
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u64 old_bw, u64 new_bw)
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{
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return dl_b->bw != -1 &&
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dl_b->bw * cpus < dl_b->total_bw - old_bw + new_bw;
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cap_scale(dl_b->bw, cap) < dl_b->total_bw - old_bw + new_bw;
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}
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extern void init_dl_bw(struct dl_bw *dl_b);
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