xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

clocksource: arch_timer: Push the read/write wrappers deeper

Browse Source 
We're going to introduce support to read and write the memory
mapped timer registers in the next patch, so push the cp15
read/write functions one level deeper. This simplifies the next
patch and makes it clearer what's going on.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
This commit is contained in:
Stephen Boyd
2013-07-18 16:59:31 -07:00
committed by Daniel Lezcano
parent d53ef114cf
commit 60faddf6eb
3 changed files with 35 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/include/asm/arch_timer.h
View File

@@ -18,7 +18,7 @@ int arch_timer_arch_init(void);
* the code. At least it does so with a recent GCC (4.6.3).
*/
static __always_inline
void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
{
if (access == ARCH_TIMER_PHYS_ACCESS) {
switch (reg) {
@@ -44,7 +44,7 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
}
static __always_inline
u32 arch_timer_reg_read(int access, enum arch_timer_reg reg)
u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
{
u32 val = 0;