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drm: omapdrm: dss: Pass DSS pointer to dss clock functions

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This removes the need to access the global DSS private data in those
functions (both for the current accesses and the future ones that will
be introduced when allocating the DSS device dynamically).

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
This commit is contained in:
Laurent Pinchart
2018-02-13 14:00:26 +02:00
committed by Tomi Valkeinen
parent 3cc62aadf4
commit 60f9c59fc1
5 changed files with 38 additions and 36 deletions
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8
drivers/gpu/drm/omapdrm/dss/dispc.c
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@@ -3116,7 +3116,7 @@ static unsigned long dispc_fclk_rate(void)
src = dss_get_dispc_clk_source(dispc.dss);
if (src == DSS_CLK_SRC_FCK) {
r = dss_get_dispc_clk_rate();
r = dss_get_dispc_clk_rate(dispc.dss);
} else {
struct dss_pll *pll;
unsigned int clkout_idx;
@@ -3143,7 +3143,7 @@ static unsigned long dispc_mgr_lclk_rate(enum omap_channel channel)
src = dss_get_lcd_clk_source(dispc.dss, channel);
if (src == DSS_CLK_SRC_FCK) {
r = dss_get_dispc_clk_rate();
r = dss_get_dispc_clk_rate(dispc.dss);
} else {
struct dss_pll *pll;
unsigned int clkout_idx;
@@ -3499,7 +3499,7 @@ bool dispc_div_calc(unsigned long dispc_freq,
pckd_hw_min = dispc.feat->min_pcd;
pckd_hw_max = 255;
lck_max = dss_get_max_fck_rate();
lck_max = dss_get_max_fck_rate(dispc.dss);
pck_min = pck_min ? pck_min : 1;
pck_max = pck_max ? pck_max : ULONG_MAX;
@@ -4460,7 +4460,7 @@ static void dispc_errata_i734_wa(void)
/* Set up and enable display manager for LCD1 */
dispc_mgr_setup(OMAP_DSS_CHANNEL_LCD, &i734.mgri);
dispc_calc_clock_rates(dss_get_dispc_clk_rate(),
dispc_calc_clock_rates(dss_get_dispc_clk_rate(dispc.dss),
&lcd_conf.clock_info);
dispc_mgr_set_lcd_config(OMAP_DSS_CHANNEL_LCD, &lcd_conf);
dispc_mgr_set_timings(OMAP_DSS_CHANNEL_LCD, &i734.vm);