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Merge tag 'renesas-dt-timers2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

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Pull "Second Round of Renesas ARM Based SoC DT Timers Updates for v3.18" from Simon Horman:

* kzm9g-reference: Enable CMT1 in device tree
* Use SoC-specific timer compat strings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'renesas-dt-timers2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: kzm9g-reference: Enable CMT1 in device tree
  ARM: shmobile: sh73a0: Add CMT1 device to DT
  ARM: shmobile: r8a7740: Use SoC-specific 48-bit CMT compat string
  ARM: shmobile: r8a7779: Use SoC-specific TMU compat string
  ARM: shmobile: r8a7791: Use SoC-specific 48-bit CMT compat string
  ARM: shmobile: r7s72100: Use SoC-specific MTU2 compat string
  ARM: shmobile: r8a7790: Use SoC-specific 48-bit CMT compat string
This commit is contained in:
Arnd Bergmann
2014-09-11 09:45:18 +02:00
parent 138310e18b 48a0d1e07d
commit 60f91268ee
8 changed files with 24 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/r7s72100.dtsi
View File

@@ -230,7 +230,7 @@
}; };
mtu2: timer@fcff0000 { mtu2: timer@fcff0000 {
compatible = "renesas,mtu2"; compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
reg = <0xfcff0000 0x400>; reg = <0xfcff0000 0x400>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tgi0a"; interrupt-names = "tgi0a";

2
arch/arm/boot/dts/r8a7740.dtsi
View File

@@ -42,7 +42,7 @@
}; };
cmt1: timer@e6138000 { cmt1: timer@e6138000 {
compatible = "renesas,cmt-48"; compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
reg = <0xe6138000 0x170>; reg = <0xe6138000 0x170>;
interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7740_CLK_CMT1>; clocks = <&mstp3_clks R8A7740_CLK_CMT1>;

6
arch/arm/boot/dts/r8a7779.dtsi
View File

@@ -267,7 +267,7 @@
}; };
tmu0: timer@ffd80000 { tmu0: timer@ffd80000 {
compatible = "renesas,tmu"; compatible = "renesas,tmu-r8a7779", "renesas,tmu";
reg = <0xffd80000 0x30>; reg = <0xffd80000 0x30>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
<0 33 IRQ_TYPE_LEVEL_HIGH>, <0 33 IRQ_TYPE_LEVEL_HIGH>,
@@ -281,7 +281,7 @@
}; };
tmu1: timer@ffd81000 { tmu1: timer@ffd81000 {
compatible = "renesas,tmu"; compatible = "renesas,tmu-r8a7779", "renesas,tmu";
reg = <0xffd81000 0x30>; reg = <0xffd81000 0x30>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
<0 37 IRQ_TYPE_LEVEL_HIGH>, <0 37 IRQ_TYPE_LEVEL_HIGH>,
@@ -295,7 +295,7 @@
}; };
tmu2: timer@ffd82000 { tmu2: timer@ffd82000 {
compatible = "renesas,tmu"; compatible = "renesas,tmu-r8a7779", "renesas,tmu";
reg = <0xffd82000 0x30>; reg = <0xffd82000 0x30>;
interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
<0 41 IRQ_TYPE_LEVEL_HIGH>, <0 41 IRQ_TYPE_LEVEL_HIGH>,

4
arch/arm/boot/dts/r8a7790.dtsi
View File

@@ -207,7 +207,7 @@
}; };
cmt0: timer@ffca0000 { cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-gen2"; compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
reg = <0 0xffca0000 0 0x1004>; reg = <0 0xffca0000 0 0x1004>;
interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
<0 143 IRQ_TYPE_LEVEL_HIGH>; <0 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -220,7 +220,7 @@
}; };
cmt1: timer@e6130000 { cmt1: timer@e6130000 {
compatible = "renesas,cmt-48-gen2"; compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
reg = <0 0xe6130000 0 0x1004>; reg = <0 0xe6130000 0 0x1004>;
interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
<0 121 IRQ_TYPE_LEVEL_HIGH>, <0 121 IRQ_TYPE_LEVEL_HIGH>,

4
arch/arm/boot/dts/r8a7791.dtsi
View File

@@ -190,7 +190,7 @@
}; };
cmt0: timer@ffca0000 { cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-gen2"; compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
reg = <0 0xffca0000 0 0x1004>; reg = <0 0xffca0000 0 0x1004>;
interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
<0 143 IRQ_TYPE_LEVEL_HIGH>; <0 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -203,7 +203,7 @@
}; };
cmt1: timer@e6130000 { cmt1: timer@e6130000 {
compatible = "renesas,cmt-48-gen2"; compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
reg = <0 0xe6130000 0 0x1004>; reg = <0 0xe6130000 0 0x1004>;
interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
<0 121 IRQ_TYPE_LEVEL_HIGH>, <0 121 IRQ_TYPE_LEVEL_HIGH>,

4
arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
View File

@@ -173,6 +173,10 @@
}; };
}; };
&cmt1 {
status = "ok";
};
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
as3711@40 { as3711@40 {

10
arch/arm/boot/dts/sh73a0.dtsi
View File

@@ -47,6 +47,16 @@
<0 56 IRQ_TYPE_LEVEL_HIGH>; <0 56 IRQ_TYPE_LEVEL_HIGH>;
}; };
cmt1: timer@e6138000 {
compatible = "renesas,cmt-48-sh73a0", "renesas,cmt-48";
reg = <0xe6138000 0x200>;
interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
renesas,channels-mask = <0x3f>;
status = "disabled";
};
irqpin0: irqpin@e6900000 { irqpin0: irqpin@e6900000 {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;

11
arch/arm/mach-shmobile/setup-sh73a0.c
View File

@@ -697,10 +697,6 @@ static struct platform_device irqpin3_device = {
}, },
}; };
static struct platform_device *sh73a0_devices_dt[] __initdata = {
&cmt1_device,
};
static struct platform_device *sh73a0_early_devices[] __initdata = { static struct platform_device *sh73a0_early_devices[] __initdata = {
&scif0_device, &scif0_device,
&scif1_device, &scif1_device,
@@ -713,6 +709,7 @@ static struct platform_device *sh73a0_early_devices[] __initdata = {
&scif8_device, &scif8_device,
&tmu0_device, &tmu0_device,
&ipmmu_device, &ipmmu_device,
&cmt1_device,
}; };
static struct platform_device *sh73a0_late_devices[] __initdata = { static struct platform_device *sh73a0_late_devices[] __initdata = {
@@ -737,8 +734,6 @@ void __init sh73a0_add_standard_devices(void)
/* Clear software reset bit on SY-DMAC module */ /* Clear software reset bit on SY-DMAC module */
__raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2);
platform_add_devices(sh73a0_devices_dt,
ARRAY_SIZE(sh73a0_devices_dt));
platform_add_devices(sh73a0_early_devices, platform_add_devices(sh73a0_early_devices,
ARRAY_SIZE(sh73a0_early_devices)); ARRAY_SIZE(sh73a0_early_devices));
platform_add_devices(sh73a0_late_devices, platform_add_devices(sh73a0_late_devices,
@@ -763,8 +758,6 @@ void __init sh73a0_earlytimer_init(void)
void __init sh73a0_add_early_devices(void) void __init sh73a0_add_early_devices(void)
{ {
early_platform_add_devices(sh73a0_devices_dt,
ARRAY_SIZE(sh73a0_devices_dt));
early_platform_add_devices(sh73a0_early_devices, early_platform_add_devices(sh73a0_early_devices,
ARRAY_SIZE(sh73a0_early_devices)); ARRAY_SIZE(sh73a0_early_devices));
@@ -779,8 +772,6 @@ void __init sh73a0_add_standard_devices_dt(void)
/* clocks are setup late during boot in the case of DT */ /* clocks are setup late during boot in the case of DT */
sh73a0_clock_init(); sh73a0_clock_init();
platform_add_devices(sh73a0_devices_dt,
ARRAY_SIZE(sh73a0_devices_dt));
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
} }