Merge tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.8 * Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC * Update console parameters to uniformly use chosen/stdout-path, serial0, not provide kernel unnecessary command line parameters * Add DU pins to silk board * Add support for blanche/r8a7792 * Name pfc subnodes after device name * tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (41 commits) ARM: dts: r8a7792: add SMP support ARM: dts: r8a7793: Add APMU node and second CPU core ARM: dts: r8a7791: Add APMU node ARM: dts: r8a7790: Add APMU nodes devicetree: bindings: Renesas APMU and SMP Enable method ARM: dts: kzm9g: Update console parameters ARM: dts: kzm9d: Update console parameters ARM: dts: marzen: Add serial port config to chosen/stdout-path ARM: dts: genmai: Update console parameters ARM: dts: armadillo800eva: Update console parameters ARM: dts: r8a7792: add JPU support ARM: dts: r8a7792: add JPU clocks ARM: dts: silk: add DU pins ARM: dts: blanche: add Ethernet support ARM: dts: blanche: initial device tree ARM: dts: blanche: document Blanche board ARM: dts: r8a7792: add IRQC support ARM: dts: r8a7792: add [H]SCIF support ARM: dts: r8a7792: add SYS-DMAC support ARM: dts: r8a7792: initial SoC device tree ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
103
include/dt-bindings/clock/r8a7792-clock.h
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103
include/dt-bindings/clock/r8a7792-clock.h
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/*
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* Copyright (C) 2016 Cogent Embedded, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7792_H__
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#define __DT_BINDINGS_CLOCK_R8A7792_H__
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/* CPG */
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#define R8A7792_CLK_MAIN 0
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#define R8A7792_CLK_PLL0 1
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#define R8A7792_CLK_PLL1 2
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#define R8A7792_CLK_PLL3 3
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#define R8A7792_CLK_LB 4
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#define R8A7792_CLK_QSPI 5
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#define R8A7792_CLK_Z 6
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#define R8A7792_CLK_ADSP 7
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/* MSTP0 */
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#define R8A7792_CLK_MSIOF0 0
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/* MSTP1 */
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#define R8A7792_CLK_JPU 6
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#define R8A7792_CLK_TMU1 11
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#define R8A7792_CLK_TMU3 21
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#define R8A7792_CLK_TMU2 22
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#define R8A7792_CLK_CMT0 24
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#define R8A7792_CLK_TMU0 25
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#define R8A7792_CLK_VSP1DU1 27
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#define R8A7792_CLK_VSP1DU0 28
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#define R8A7792_CLK_VSP1_SY 31
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/* MSTP2 */
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#define R8A7792_CLK_MSIOF1 8
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#define R8A7792_CLK_SYS_DMAC1 18
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#define R8A7792_CLK_SYS_DMAC0 19
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/* MSTP3 */
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#define R8A7792_CLK_TPU0 4
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#define R8A7792_CLK_SDHI0 14
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#define R8A7792_CLK_CMT1 29
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/* MSTP4 */
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#define R8A7792_CLK_IRQC 7
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/* MSTP5 */
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#define R8A7792_CLK_AUDIO_DMAC0 2
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#define R8A7792_CLK_THERMAL 22
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#define R8A7792_CLK_PWM 23
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/* MSTP7 */
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#define R8A7792_CLK_HSCIF1 16
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#define R8A7792_CLK_HSCIF0 17
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#define R8A7792_CLK_SCIF3 18
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#define R8A7792_CLK_SCIF2 19
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#define R8A7792_CLK_SCIF1 20
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#define R8A7792_CLK_SCIF0 21
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#define R8A7792_CLK_DU1 23
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#define R8A7792_CLK_DU0 24
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/* MSTP8 */
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#define R8A7792_CLK_VIN5 4
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#define R8A7792_CLK_VIN4 5
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#define R8A7792_CLK_VIN3 8
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#define R8A7792_CLK_VIN2 9
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#define R8A7792_CLK_VIN1 10
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#define R8A7792_CLK_VIN0 11
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#define R8A7792_CLK_ETHERAVB 12
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/* MSTP9 */
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#define R8A7792_CLK_GPIO7 4
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#define R8A7792_CLK_GPIO6 5
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#define R8A7792_CLK_GPIO5 7
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#define R8A7792_CLK_GPIO4 8
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#define R8A7792_CLK_GPIO3 9
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#define R8A7792_CLK_GPIO2 10
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#define R8A7792_CLK_GPIO1 11
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#define R8A7792_CLK_GPIO0 12
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#define R8A7792_CLK_GPIO11 13
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#define R8A7792_CLK_GPIO10 14
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#define R8A7792_CLK_CAN1 15
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#define R8A7792_CLK_CAN0 16
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#define R8A7792_CLK_QSPI_MOD 17
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#define R8A7792_CLK_GPIO9 19
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#define R8A7792_CLK_GPIO8 21
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#define R8A7792_CLK_I2C5 25
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#define R8A7792_CLK_IICDVFS 26
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#define R8A7792_CLK_I2C4 27
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#define R8A7792_CLK_I2C3 28
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#define R8A7792_CLK_I2C2 29
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#define R8A7792_CLK_I2C1 30
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#define R8A7792_CLK_I2C0 31
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/* MSTP10 */
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#define R8A7792_CLK_SSI_ALL 5
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#define R8A7792_CLK_SSI4 11
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#define R8A7792_CLK_SSI3 12
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#endif /* __DT_BINDINGS_CLOCK_R8A7792_H__ */
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26
include/dt-bindings/power/r8a7792-sysc.h
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include/dt-bindings/power/r8a7792-sysc.h
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/*
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* Copyright (C) 2016 Cogent Embedded Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7792_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7792_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A7792_PD_CA15_CPU0 0
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#define R8A7792_PD_CA15_CPU1 1
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#define R8A7792_PD_CA15_SCU 12
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#define R8A7792_PD_SGX 20
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#define R8A7792_PD_IMP 24
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/* Always-on power area */
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#define R8A7792_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7792_SYSC_H__ */
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