Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull locking updates from Ingo Molnar: - Add 'cross-release' support to lockdep, which allows APIs like completions, where it's not the 'owner' who releases the lock, to be tracked. It's all activated automatically under CONFIG_PROVE_LOCKING=y. - Clean up (restructure) the x86 atomics op implementation to be more readable, in preparation of KASAN annotations. (Dmitry Vyukov) - Fix static keys (Paolo Bonzini) - Add killable versions of down_read() et al (Kirill Tkhai) - Rework and fix jump_label locking (Marc Zyngier, Paolo Bonzini) - Rework (and fix) tlb_flush_pending() barriers (Peter Zijlstra) - Remove smp_mb__before_spinlock() and convert its usages, introduce smp_mb__after_spinlock() (Peter Zijlstra) * 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (56 commits) locking/lockdep/selftests: Fix mixed read-write ABBA tests sched/completion: Avoid unnecessary stack allocation for COMPLETION_INITIALIZER_ONSTACK() acpi/nfit: Fix COMPLETION_INITIALIZER_ONSTACK() abuse locking/pvqspinlock: Relax cmpxchg's to improve performance on some architectures smp: Avoid using two cache lines for struct call_single_data locking/lockdep: Untangle xhlock history save/restore from task independence locking/refcounts, x86/asm: Disable CONFIG_ARCH_HAS_REFCOUNT for the time being futex: Remove duplicated code and fix undefined behaviour Documentation/locking/atomic: Finish the document... locking/lockdep: Fix workqueue crossrelease annotation workqueue/lockdep: 'Fix' flush_work() annotation locking/lockdep/selftests: Add mixed read-write ABBA tests mm, locking/barriers: Clarify tlb_flush_pending() barriers locking/lockdep: Make CONFIG_LOCKDEP_CROSSRELEASE and CONFIG_LOCKDEP_COMPLETIONS truly non-interactive locking/lockdep: Explicitly initialize wq_barrier::done::map locking/lockdep: Rename CONFIG_LOCKDEP_COMPLETE to CONFIG_LOCKDEP_COMPLETIONS locking/lockdep: Reword title of LOCKDEP_CROSSRELEASE config locking/lockdep: Make CONFIG_LOCKDEP_CROSSRELEASE part of CONFIG_PROVE_LOCKING locking/refcounts, x86/asm: Implement fast refcount overflow protection locking/lockdep: Fix the rollback and overwrite detection logic in crossrelease ...
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@@ -498,11 +498,11 @@ And a couple of implicit varieties:
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This means that ACQUIRE acts as a minimal "acquire" operation and
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RELEASE acts as a minimal "release" operation.
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A subset of the atomic operations described in core-api/atomic_ops.rst have
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ACQUIRE and RELEASE variants in addition to fully-ordered and relaxed (no
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barrier semantics) definitions. For compound atomics performing both a load
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and a store, ACQUIRE semantics apply only to the load and RELEASE semantics
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apply only to the store portion of the operation.
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A subset of the atomic operations described in atomic_t.txt have ACQUIRE and
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RELEASE variants in addition to fully-ordered and relaxed (no barrier
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semantics) definitions. For compound atomics performing both a load and a
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store, ACQUIRE semantics apply only to the load and RELEASE semantics apply
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only to the store portion of the operation.
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Memory barriers are only required where there's a possibility of interaction
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between two CPUs or between a CPU and a device. If it can be guaranteed that
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@@ -1883,8 +1883,7 @@ There are some more advanced barrier functions:
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This makes sure that the death mark on the object is perceived to be set
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*before* the reference counter is decremented.
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See Documentation/core-api/atomic_ops.rst for more information. See the
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"Atomic operations" subsection for information on where to use these.
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See Documentation/atomic_{t,bitops}.txt for more information.
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(*) lockless_dereference();
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@@ -1989,10 +1988,7 @@ for each construct. These operations all imply certain barriers:
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ACQUIRE operation has completed.
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Memory operations issued before the ACQUIRE may be completed after
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the ACQUIRE operation has completed. An smp_mb__before_spinlock(),
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combined with a following ACQUIRE, orders prior stores against
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subsequent loads and stores. Note that this is weaker than smp_mb()!
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The smp_mb__before_spinlock() primitive is free on many architectures.
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the ACQUIRE operation has completed.
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(2) RELEASE operation implication:
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@@ -2510,88 +2506,7 @@ operations are noted specially as some of them imply full memory barriers and
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some don't, but they're very heavily relied on as a group throughout the
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kernel.
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Any atomic operation that modifies some state in memory and returns information
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about the state (old or new) implies an SMP-conditional general memory barrier
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(smp_mb()) on each side of the actual operation (with the exception of
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explicit lock operations, described later). These include:
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xchg();
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atomic_xchg(); atomic_long_xchg();
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atomic_inc_return(); atomic_long_inc_return();
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atomic_dec_return(); atomic_long_dec_return();
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atomic_add_return(); atomic_long_add_return();
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atomic_sub_return(); atomic_long_sub_return();
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atomic_inc_and_test(); atomic_long_inc_and_test();
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atomic_dec_and_test(); atomic_long_dec_and_test();
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atomic_sub_and_test(); atomic_long_sub_and_test();
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atomic_add_negative(); atomic_long_add_negative();
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test_and_set_bit();
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test_and_clear_bit();
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test_and_change_bit();
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/* when succeeds */
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cmpxchg();
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atomic_cmpxchg(); atomic_long_cmpxchg();
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atomic_add_unless(); atomic_long_add_unless();
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These are used for such things as implementing ACQUIRE-class and RELEASE-class
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operations and adjusting reference counters towards object destruction, and as
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such the implicit memory barrier effects are necessary.
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The following operations are potential problems as they do _not_ imply memory
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barriers, but might be used for implementing such things as RELEASE-class
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operations:
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atomic_set();
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set_bit();
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clear_bit();
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change_bit();
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With these the appropriate explicit memory barrier should be used if necessary
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(smp_mb__before_atomic() for instance).
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The following also do _not_ imply memory barriers, and so may require explicit
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memory barriers under some circumstances (smp_mb__before_atomic() for
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instance):
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atomic_add();
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atomic_sub();
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atomic_inc();
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atomic_dec();
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If they're used for statistics generation, then they probably don't need memory
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barriers, unless there's a coupling between statistical data.
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If they're used for reference counting on an object to control its lifetime,
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they probably don't need memory barriers because either the reference count
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will be adjusted inside a locked section, or the caller will already hold
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sufficient references to make the lock, and thus a memory barrier unnecessary.
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If they're used for constructing a lock of some description, then they probably
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do need memory barriers as a lock primitive generally has to do things in a
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specific order.
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Basically, each usage case has to be carefully considered as to whether memory
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barriers are needed or not.
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The following operations are special locking primitives:
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test_and_set_bit_lock();
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clear_bit_unlock();
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__clear_bit_unlock();
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These implement ACQUIRE-class and RELEASE-class operations. These should be
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used in preference to other operations when implementing locking primitives,
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because their implementations can be optimised on many architectures.
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[!] Note that special memory barrier primitives are available for these
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situations because on some CPUs the atomic instructions used imply full memory
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barriers, and so barrier instructions are superfluous in conjunction with them,
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and in such cases the special barrier primitives will be no-ops.
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See Documentation/core-api/atomic_ops.rst for more information.
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See Documentation/atomic_t.txt for more information.
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ACCESSING DEVICES
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