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agp/intel: Use pci_bus_address() to get MMADR bus address

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Per the Intel 915G/915GV/... Chipset spec (document number 301467-005),
MMADR is a standard PCI BAR.

The PCI core reads MMADR at enumeration-time.  Use pci_bus_address()
instead of reading it again in the driver.  This works correctly for both
32-bit and 64-bit BARs.  The spec above only mentions 32-bit MMADR, but we
should still use the standard interface.

Also, stop clearing the low 19 bits of the bus address because it's invalid
to use addresses outside the region defined by the BAR.  The spec claims
MMADR is 512KB; if that's the case, those bits will be zero anyway.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Bjorn Helgaas
2014-01-03 18:28:31 -07:00
parent 545b0a746b
commit 5ef6d8f495
2 changed files with 5 additions and 9 deletions
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10
drivers/char/agp/intel-gtt.c
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@@ -181,8 +181,7 @@ static int i810_setup(void)
return -ENOMEM;
intel_private.i81x_gtt_table = gtt_table;
pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &reg_addr);
reg_addr &= 0xfff80000;
reg_addr = pci_bus_address(intel_private.pcidev, I810_MMADR_BAR);
intel_private.registers = ioremap(reg_addr, KB(64));
if (!intel_private.registers)
@@ -785,8 +784,7 @@ static int i830_setup(void)
{
u32 reg_addr;
pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &reg_addr);
reg_addr &= 0xfff80000;
reg_addr = pci_bus_address(intel_private.pcidev, I810_MMADR_BAR);
intel_private.registers = ioremap(reg_addr, KB(64));
if (!intel_private.registers)
@@ -1107,9 +1105,7 @@ static int i9xx_setup(void)
u32 reg_addr, gtt_addr;
int size = KB(512);
pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &reg_addr);
reg_addr &= 0xfff80000;
reg_addr = pci_bus_address(intel_private.pcidev, I915_MMADR_BAR);
intel_private.registers = ioremap(reg_addr, size);
if (!intel_private.registers)