drm/amdgpu/gfx9: cache DB_DEBUG2 and make it available to userspace
Userspace needs to query this value to work around a hw bug in certain cases. Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -287,6 +287,7 @@ static struct soc15_allowed_register_entry soc15_allowed_read_registers[] = {
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{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STALLED_STAT1)},
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{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},
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{ SOC15_REG_ENTRY(GC, 0, mmGB_ADDR_CONFIG)},
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{ SOC15_REG_ENTRY(GC, 0, mmDB_DEBUG2)},
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};
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static uint32_t soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num,
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@@ -315,6 +316,8 @@ static uint32_t soc15_get_register_value(struct amdgpu_device *adev,
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} else {
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if (reg_offset == SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG))
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return adev->gfx.config.gb_addr_config;
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else if (reg_offset == SOC15_REG_OFFSET(GC, 0, mmDB_DEBUG2))
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return adev->gfx.config.db_debug2;
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return RREG32(reg_offset);
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}
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}
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