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powerpc/mm: pte_frag abstraction

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In this patch we make the number of pte fragments per level 4 page table
page a variable. Radix level 4 table size is 256 bytes and hence we can
have 256 fragments per level 4 page. We don't update the fragment count
in this patch. We need to do performance measurements to find the right
value for fragment count.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Aneesh Kumar K.V
2016-04-29 23:26:23 +10:00
committed by Michael Ellerman
parent a3dece6d69
commit 5ed7ecd08a
6 changed files with 22 additions and 2 deletions
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2
arch/powerpc/include/asm/book3s/64/hash-4k.h
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@@ -28,6 +28,8 @@
#define H_PAGE_4K_PFN 0x0
#define H_PAGE_THP_HUGE 0x0
#define H_PAGE_COMBO 0x0
#define H_PTE_FRAG_NR 0
#define H_PTE_FRAG_SIZE_SHIFT 0
/*
* On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
*/

4
arch/powerpc/include/asm/book3s/64/hash-64k.h
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@@ -29,12 +29,12 @@
/*
* we support 16 fragments per PTE page of 64K size.
*/
#define PTE_FRAG_NR 16
#define H_PTE_FRAG_NR 16
/*
* We use a 2K PTE page fragment and another 2K for storing
* real_pte_t hash index
*/
#define PTE_FRAG_SIZE_SHIFT 12
#define H_PTE_FRAG_SIZE_SHIFT 12
#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
#ifndef __ASSEMBLY__

6
arch/powerpc/include/asm/book3s/64/pgtable.h
View File

@@ -177,6 +177,12 @@ extern unsigned long __pgd_val_bits;
#define PMD_VAL_BITS __pmd_val_bits
#define PUD_VAL_BITS __pud_val_bits
#define PGD_VAL_BITS __pgd_val_bits
extern unsigned long __pte_frag_nr;
#define PTE_FRAG_NR __pte_frag_nr
extern unsigned long __pte_frag_size_shift;
#define PTE_FRAG_SIZE_SHIFT __pte_frag_size_shift
#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
/*
* Pgtable size used by swapper, init in asm code
*/