Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm soc-specific updates from Arnd Bergmann:
"This is stuff that does not fit well into another category and in
particular is not related to a particular board. The largest part in
here is extending the am33xx support in the omap platform."
Fix up trivial conflicts in arch/arm/mach-{imx/mach-mx35_3ds.c, tegra/Makefile}
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
ARM: LPC32xx: Add PWM support
ARM: LPC32xx: Add PWM clock
ARM: LPC32xx: Set system serial based on cpu unique id
ARM: vexpress: Config option for early printk console
ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tile
ARM: vexpress: Convert V2P-CA15 Device Tree to 64 bit addresses
ARM: vexpress: Add fixed regulator for SMSC
ARM: vexpress: Add missing SP804 interrupt in motherboard's DTS files
ARM: vexpress: Initial common clock support
ARM: SAMSUNG: Introduce Kconfig variable for Samsung custom clk API
ARM: EXYNOS: Add missing static storage class specifier in pmu.c file
ARM: EXYNOS: Make combiner_init function static
ARM: EXYNOS: Update HSOTG PHY clock setting for EXYNOS4X12
ARM: versatile: Make plat-versatile clock optional
ARM: vexpress: Check master site in daughterboard's sysctl operations
ARM: vexpress: remove automatic errata workaround selection
ARM: LPC32xx: Adjust to pl08x DMA interface changes
ARM: EXYNOS: Clear SYS_WDTRESET bit to use watchdog reset
ARM: imx: fix mx51 ehci setup errors
ARM: imx: make ehci power/oc polarities configurable
...
This commit is contained in:
Linus Torvalds
157
arch/arm/boot/dts/ea3250.dts
Normal file
157
arch/arm/boot/dts/ea3250.dts
Normal file
@@ -0,0 +1,157 @@
|
||||
/*
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||||
* Embedded Artists LPC3250 board
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*
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* Copyright 2012 Roland Stigge <stigge@antcom.de>
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/dts-v1/;
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||||
/include/ "lpc32xx.dtsi"
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||||
|
||||
/ {
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||||
model = "Embedded Artists LPC3250 board based on NXP LPC3250";
|
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compatible = "ea,ea3250", "nxp,lpc3250";
|
||||
#address-cells = <1>;
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||||
#size-cells = <1>;
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||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0x4000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
mac: ethernet@31060000 {
|
||||
phy-mode = "rmii";
|
||||
use-iram;
|
||||
};
|
||||
|
||||
/* Here, choose exactly one from: ohci, usbd */
|
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ohci@31020000 {
|
||||
transceiver = <&isp1301>;
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||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
usbd@31020000 {
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transceiver = <&isp1301>;
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status = "okay";
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||||
};
|
||||
*/
|
||||
|
||||
/* 128MB Flash via SLC NAND controller */
|
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slc: flash@20020000 {
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status = "okay";
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#address-cells = <1>;
|
||||
#size-cells = <1>;
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|
||||
nxp,wdr-clks = <14>;
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nxp,wwidth = <260000000>;
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nxp,whold = <104000000>;
|
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nxp,wsetup = <200000000>;
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nxp,rdr-clks = <14>;
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nxp,rwidth = <34666666>;
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nxp,rhold = <104000000>;
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||||
nxp,rsetup = <200000000>;
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nand-on-flash-bbt;
|
||||
gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
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||||
|
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mtd0@00000000 {
|
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label = "ea3250-boot";
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reg = <0x00000000 0x00080000>;
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read-only;
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||||
};
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||||
|
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mtd1@00080000 {
|
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label = "ea3250-uboot";
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reg = <0x00080000 0x000c0000>;
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read-only;
|
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};
|
||||
|
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mtd2@00140000 {
|
||||
label = "ea3250-kernel";
|
||||
reg = <0x00140000 0x00400000>;
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||||
};
|
||||
|
||||
mtd3@00540000 {
|
||||
label = "ea3250-rootfs";
|
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reg = <0x00540000 0x07ac0000>;
|
||||
};
|
||||
};
|
||||
|
||||
apb {
|
||||
uart5: serial@40090000 {
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||||
status = "okay";
|
||||
};
|
||||
|
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uart3: serial@40080000 {
|
||||
status = "okay";
|
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};
|
||||
|
||||
uart6: serial@40098000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@400A0000 {
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clock-frequency = <100000>;
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||||
|
||||
eeprom@50 {
|
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compatible = "at,24c256";
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reg = <0x50>;
|
||||
};
|
||||
|
||||
eeprom@57 {
|
||||
compatible = "at,24c64";
|
||||
reg = <0x57>;
|
||||
};
|
||||
|
||||
uda1380: uda1380@18 {
|
||||
compatible = "nxp,uda1380";
|
||||
reg = <0x18>;
|
||||
power-gpio = <&gpio 0x59 0>;
|
||||
reset-gpio = <&gpio 0x51 0>;
|
||||
dac-clk = "wspll";
|
||||
};
|
||||
|
||||
pca9532: pca9532@60 {
|
||||
compatible = "nxp,pca9532";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x60>;
|
||||
};
|
||||
};
|
||||
|
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i2c2: i2c@400A8000 {
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
i2cusb: i2c@31020300 {
|
||||
clock-frequency = <100000>;
|
||||
|
||||
isp1301: usb-transceiver@2d {
|
||||
compatible = "nxp,isp1301";
|
||||
reg = <0x2d>;
|
||||
};
|
||||
};
|
||||
|
||||
sd@20098000 {
|
||||
wp-gpios = <&pca9532 5 0>;
|
||||
cd-gpios = <&pca9532 4 0>;
|
||||
cd-inverted;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
fab {
|
||||
uart1: serial@40014000 {
|
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status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -35,13 +35,14 @@
|
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slc: flash@20020000 {
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||||
compatible = "nxp,lpc3220-slc";
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||||
reg = <0x20020000 0x1000>;
|
||||
status = "disable";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mlc: flash@200B0000 {
|
||||
mlc: flash@200a8000 {
|
||||
compatible = "nxp,lpc3220-mlc";
|
||||
reg = <0x200B0000 0x1000>;
|
||||
status = "disable";
|
||||
reg = <0x200a8000 0x11000>;
|
||||
interrupts = <11 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma@31000000 {
|
||||
@@ -57,21 +58,21 @@
|
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compatible = "nxp,ohci-nxp", "usb-ohci";
|
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reg = <0x31020000 0x300>;
|
||||
interrupts = <0x3b 0>;
|
||||
status = "disable";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbd@31020000 {
|
||||
compatible = "nxp,lpc3220-udc";
|
||||
reg = <0x31020000 0x300>;
|
||||
interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
|
||||
status = "disable";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clcd@31040000 {
|
||||
compatible = "arm,pl110", "arm,primecell";
|
||||
reg = <0x31040000 0x1000>;
|
||||
interrupts = <0x0e 0>;
|
||||
status = "disable";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mac: ethernet@31060000 {
|
||||
@@ -114,9 +115,10 @@
|
||||
};
|
||||
|
||||
sd@20098000 {
|
||||
compatible = "arm,pl180", "arm,primecell";
|
||||
compatible = "arm,pl18x", "arm,primecell";
|
||||
reg = <0x20098000 0x1000>;
|
||||
interrupts = <0x0f 0>, <0x0d 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2s1: i2s@2009C000 {
|
||||
@@ -124,24 +126,42 @@
|
||||
reg = <0x2009C000 0x1000>;
|
||||
};
|
||||
|
||||
/* UART5 first since it is the default console, ttyS0 */
|
||||
uart5: serial@40090000 {
|
||||
/* actually, ns16550a w/ 64 byte fifos! */
|
||||
compatible = "nxp,lpc3220-uart";
|
||||
reg = <0x40090000 0x1000>;
|
||||
interrupts = <9 0>;
|
||||
clock-frequency = <13000000>;
|
||||
reg-shift = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: serial@40080000 {
|
||||
compatible = "nxp,serial";
|
||||
compatible = "nxp,lpc3220-uart";
|
||||
reg = <0x40080000 0x1000>;
|
||||
interrupts = <7 0>;
|
||||
clock-frequency = <13000000>;
|
||||
reg-shift = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart4: serial@40088000 {
|
||||
compatible = "nxp,serial";
|
||||
compatible = "nxp,lpc3220-uart";
|
||||
reg = <0x40088000 0x1000>;
|
||||
};
|
||||
|
||||
uart5: serial@40090000 {
|
||||
compatible = "nxp,serial";
|
||||
reg = <0x40090000 0x1000>;
|
||||
interrupts = <8 0>;
|
||||
clock-frequency = <13000000>;
|
||||
reg-shift = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart6: serial@40098000 {
|
||||
compatible = "nxp,serial";
|
||||
compatible = "nxp,lpc3220-uart";
|
||||
reg = <0x40098000 0x1000>;
|
||||
interrupts = <10 0>;
|
||||
clock-frequency = <13000000>;
|
||||
reg-shift = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@400A0000 {
|
||||
@@ -192,18 +212,24 @@
|
||||
};
|
||||
|
||||
uart1: serial@40014000 {
|
||||
compatible = "nxp,serial";
|
||||
compatible = "nxp,lpc3220-hsuart";
|
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reg = <0x40014000 0x1000>;
|
||||
interrupts = <26 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@40018000 {
|
||||
compatible = "nxp,serial";
|
||||
compatible = "nxp,lpc3220-hsuart";
|
||||
reg = <0x40018000 0x1000>;
|
||||
interrupts = <25 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart7: serial@4001C000 {
|
||||
compatible = "nxp,serial";
|
||||
reg = <0x4001C000 0x1000>;
|
||||
uart7: serial@4001c000 {
|
||||
compatible = "nxp,lpc3220-hsuart";
|
||||
reg = <0x4001c000 0x1000>;
|
||||
interrupts = <24 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc@40024000 {
|
||||
@@ -235,19 +261,21 @@
|
||||
compatible = "nxp,lpc3220-adc";
|
||||
reg = <0x40048000 0x1000>;
|
||||
interrupts = <0x27 0>;
|
||||
status = "disable";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tsc@40048000 {
|
||||
compatible = "nxp,lpc3220-tsc";
|
||||
reg = <0x40048000 0x1000>;
|
||||
interrupts = <0x27 0>;
|
||||
status = "disable";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
key@40050000 {
|
||||
compatible = "nxp,lpc3220-key";
|
||||
reg = <0x40050000 0x1000>;
|
||||
interrupts = <54 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
@@ -54,6 +54,17 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nxp,wdr-clks = <14>;
|
||||
nxp,wwidth = <40000000>;
|
||||
nxp,whold = <100000000>;
|
||||
nxp,wsetup = <100000000>;
|
||||
nxp,rdr-clks = <14>;
|
||||
nxp,rwidth = <40000000>;
|
||||
nxp,rhold = <66666666>;
|
||||
nxp,rsetup = <100000000>;
|
||||
nand-on-flash-bbt;
|
||||
gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
|
||||
|
||||
mtd0@00000000 {
|
||||
label = "phy3250-boot";
|
||||
reg = <0x00000000 0x00064000>;
|
||||
@@ -83,6 +94,14 @@
|
||||
};
|
||||
|
||||
apb {
|
||||
uart5: serial@40090000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart3: serial@40080000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@400A0000 {
|
||||
clock-frequency = <100000>;
|
||||
|
||||
@@ -114,16 +133,58 @@
|
||||
};
|
||||
|
||||
ssp0: ssp@20084000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pl022,num-chipselects = <1>;
|
||||
cs-gpios = <&gpio 3 5 0>;
|
||||
|
||||
eeprom: at25@0 {
|
||||
pl022,hierarchy = <0>;
|
||||
pl022,interface = <0>;
|
||||
pl022,slave-tx-disable = <0>;
|
||||
pl022,com-mode = <0>;
|
||||
pl022,rx-level-trig = <1>;
|
||||
pl022,tx-level-trig = <1>;
|
||||
pl022,ctrl-len = <11>;
|
||||
pl022,wait-state = <0>;
|
||||
pl022,duplex = <0>;
|
||||
|
||||
at25,byte-len = <0x8000>;
|
||||
at25,addr-mode = <2>;
|
||||
at25,page-size = <64>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
sd@20098000 {
|
||||
wp-gpios = <&gpio 3 0 0>;
|
||||
cd-gpios = <&gpio 3 1 0>;
|
||||
cd-inverted;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
fab {
|
||||
uart2: serial@40018000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
tsc@40048000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
key@40050000 {
|
||||
status = "okay";
|
||||
keypad,num-rows = <1>;
|
||||
keypad,num-columns = <1>;
|
||||
nxp,debounce-delay-ms = <3>;
|
||||
nxp,scan-delay-ms = <34>;
|
||||
linux,keymap = <0x00000002>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -55,6 +55,8 @@
|
||||
reg-io-width = <4>;
|
||||
smsc,irq-active-high;
|
||||
smsc,irq-push-pull;
|
||||
vdd33a-supply = <&v2m_fixed_3v3>;
|
||||
vddvario-supply = <&v2m_fixed_3v3>;
|
||||
};
|
||||
|
||||
usb@2,03000000 {
|
||||
@@ -157,6 +159,7 @@
|
||||
v2m_timer23: timer@120000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x120000 0x1000>;
|
||||
interrupts = <3>;
|
||||
};
|
||||
|
||||
/* DVI I2C bus */
|
||||
@@ -197,5 +200,13 @@
|
||||
interrupts = <14>;
|
||||
};
|
||||
};
|
||||
|
||||
v2m_fixed_3v3: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -54,6 +54,8 @@
|
||||
reg-io-width = <4>;
|
||||
smsc,irq-active-high;
|
||||
smsc,irq-push-pull;
|
||||
vdd33a-supply = <&v2m_fixed_3v3>;
|
||||
vddvario-supply = <&v2m_fixed_3v3>;
|
||||
};
|
||||
|
||||
usb@3,03000000 {
|
||||
@@ -156,6 +158,7 @@
|
||||
v2m_timer23: timer@12000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x12000 0x1000>;
|
||||
interrupts = <3>;
|
||||
};
|
||||
|
||||
/* DVI I2C bus */
|
||||
@@ -196,5 +199,13 @@
|
||||
interrupts = <14>;
|
||||
};
|
||||
};
|
||||
|
||||
v2m_fixed_3v3: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -14,8 +14,8 @@
|
||||
arm,hbi = <0x237>;
|
||||
compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
chosen { };
|
||||
|
||||
@@ -47,23 +47,23 @@
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>;
|
||||
reg = <0 0x80000000 0 0x40000000>;
|
||||
};
|
||||
|
||||
hdlcd@2b000000 {
|
||||
compatible = "arm,hdlcd";
|
||||
reg = <0x2b000000 0x1000>;
|
||||
reg = <0 0x2b000000 0 0x1000>;
|
||||
interrupts = <0 85 4>;
|
||||
};
|
||||
|
||||
memory-controller@2b0a0000 {
|
||||
compatible = "arm,pl341", "arm,primecell";
|
||||
reg = <0x2b0a0000 0x1000>;
|
||||
reg = <0 0x2b0a0000 0 0x1000>;
|
||||
};
|
||||
|
||||
wdt@2b060000 {
|
||||
compatible = "arm,sp805", "arm,primecell";
|
||||
reg = <0x2b060000 0x1000>;
|
||||
reg = <0 0x2b060000 0 0x1000>;
|
||||
interrupts = <98>;
|
||||
};
|
||||
|
||||
@@ -72,23 +72,23 @@
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0x2c001000 0x1000>,
|
||||
<0x2c002000 0x1000>,
|
||||
<0x2c004000 0x2000>,
|
||||
<0x2c006000 0x2000>;
|
||||
reg = <0 0x2c001000 0 0x1000>,
|
||||
<0 0x2c002000 0 0x1000>,
|
||||
<0 0x2c004000 0 0x2000>,
|
||||
<0 0x2c006000 0 0x2000>;
|
||||
interrupts = <1 9 0xf04>;
|
||||
};
|
||||
|
||||
memory-controller@7ffd0000 {
|
||||
compatible = "arm,pl354", "arm,primecell";
|
||||
reg = <0x7ffd0000 0x1000>;
|
||||
reg = <0 0x7ffd0000 0 0x1000>;
|
||||
interrupts = <0 86 4>,
|
||||
<0 87 4>;
|
||||
};
|
||||
|
||||
dma@7ffb0000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x7ffb0000 0x1000>;
|
||||
reg = <0 0x7ffb0000 0 0x1000>;
|
||||
interrupts = <0 92 4>,
|
||||
<0 88 4>,
|
||||
<0 89 4>,
|
||||
@@ -111,12 +111,12 @@
|
||||
};
|
||||
|
||||
motherboard {
|
||||
ranges = <0 0 0x08000000 0x04000000>,
|
||||
<1 0 0x14000000 0x04000000>,
|
||||
<2 0 0x18000000 0x04000000>,
|
||||
<3 0 0x1c000000 0x04000000>,
|
||||
<4 0 0x0c000000 0x04000000>,
|
||||
<5 0 0x10000000 0x04000000>;
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
||||
|
||||
188
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
Normal file
188
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
Normal file
@@ -0,0 +1,188 @@
|
||||
/*
|
||||
* ARM Ltd. Versatile Express
|
||||
*
|
||||
* CoreTile Express A15x2 A7x3
|
||||
* Cortex-A15_A7 MPCore (V2P-CA15_A7)
|
||||
*
|
||||
* HBI-0249A
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "V2P-CA15_CA7";
|
||||
arm,hbi = <0x249>;
|
||||
compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
serial0 = &v2m_serial0;
|
||||
serial1 = &v2m_serial1;
|
||||
serial2 = &v2m_serial2;
|
||||
serial3 = &v2m_serial3;
|
||||
i2c0 = &v2m_i2c_dvi;
|
||||
i2c1 = &v2m_i2c_pcie;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
/* A7s disabled till big.LITTLE patches are available...
|
||||
cpu2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x100>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x101>;
|
||||
};
|
||||
|
||||
cpu4: cpu@4 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x102>;
|
||||
};
|
||||
*/
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x80000000 0 0x40000000>;
|
||||
};
|
||||
|
||||
wdt@2a490000 {
|
||||
compatible = "arm,sp805", "arm,primecell";
|
||||
reg = <0 0x2a490000 0 0x1000>;
|
||||
interrupts = <98>;
|
||||
};
|
||||
|
||||
hdlcd@2b000000 {
|
||||
compatible = "arm,hdlcd";
|
||||
reg = <0 0x2b000000 0 0x1000>;
|
||||
interrupts = <0 85 4>;
|
||||
};
|
||||
|
||||
memory-controller@2b0a0000 {
|
||||
compatible = "arm,pl341", "arm,primecell";
|
||||
reg = <0 0x2b0a0000 0 0x1000>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@2c001000 {
|
||||
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0 0x2c001000 0 0x1000>,
|
||||
<0 0x2c002000 0 0x1000>,
|
||||
<0 0x2c004000 0 0x2000>,
|
||||
<0 0x2c006000 0 0x2000>;
|
||||
interrupts = <1 9 0xf04>;
|
||||
};
|
||||
|
||||
memory-controller@7ffd0000 {
|
||||
compatible = "arm,pl354", "arm,primecell";
|
||||
reg = <0 0x7ffd0000 0 0x1000>;
|
||||
interrupts = <0 86 4>,
|
||||
<0 87 4>;
|
||||
};
|
||||
|
||||
dma@7ff00000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0 0x7ff00000 0 0x1000>;
|
||||
interrupts = <0 92 4>,
|
||||
<0 88 4>,
|
||||
<0 89 4>,
|
||||
<0 90 4>,
|
||||
<0 91 4>;
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv7-timer";
|
||||
interrupts = <1 13 0xf08>,
|
||||
<1 14 0xf08>,
|
||||
<1 11 0xf08>,
|
||||
<1 10 0xf08>;
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
|
||||
interrupts = <0 68 4>,
|
||||
<0 69 4>;
|
||||
};
|
||||
|
||||
motherboard {
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
||||
<0 0 1 &gic 0 1 4>,
|
||||
<0 0 2 &gic 0 2 4>,
|
||||
<0 0 3 &gic 0 3 4>,
|
||||
<0 0 4 &gic 0 4 4>,
|
||||
<0 0 5 &gic 0 5 4>,
|
||||
<0 0 6 &gic 0 6 4>,
|
||||
<0 0 7 &gic 0 7 4>,
|
||||
<0 0 8 &gic 0 8 4>,
|
||||
<0 0 9 &gic 0 9 4>,
|
||||
<0 0 10 &gic 0 10 4>,
|
||||
<0 0 11 &gic 0 11 4>,
|
||||
<0 0 12 &gic 0 12 4>,
|
||||
<0 0 13 &gic 0 13 4>,
|
||||
<0 0 14 &gic 0 14 4>,
|
||||
<0 0 15 &gic 0 15 4>,
|
||||
<0 0 16 &gic 0 16 4>,
|
||||
<0 0 17 &gic 0 17 4>,
|
||||
<0 0 18 &gic 0 18 4>,
|
||||
<0 0 19 &gic 0 19 4>,
|
||||
<0 0 20 &gic 0 20 4>,
|
||||
<0 0 21 &gic 0 21 4>,
|
||||
<0 0 22 &gic 0 22 4>,
|
||||
<0 0 23 &gic 0 23 4>,
|
||||
<0 0 24 &gic 0 24 4>,
|
||||
<0 0 25 &gic 0 25 4>,
|
||||
<0 0 26 &gic 0 26 4>,
|
||||
<0 0 27 &gic 0 27 4>,
|
||||
<0 0 28 &gic 0 28 4>,
|
||||
<0 0 29 &gic 0 29 4>,
|
||||
<0 0 30 &gic 0 30 4>,
|
||||
<0 0 31 &gic 0 31 4>,
|
||||
<0 0 32 &gic 0 32 4>,
|
||||
<0 0 33 &gic 0 33 4>,
|
||||
<0 0 34 &gic 0 34 4>,
|
||||
<0 0 35 &gic 0 35 4>,
|
||||
<0 0 36 &gic 0 36 4>,
|
||||
<0 0 37 &gic 0 37 4>,
|
||||
<0 0 38 &gic 0 38 4>,
|
||||
<0 0 39 &gic 0 39 4>,
|
||||
<0 0 40 &gic 0 40 4>,
|
||||
<0 0 41 &gic 0 41 4>,
|
||||
<0 0 42 &gic 0 42 4>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "vexpress-v2m-rs1.dtsi"
|
||||
Reference in New Issue
Block a user