powerpc/QE: add support for QE USB clocks routing
This patch adds a function to the qe_lib to setup QE USB clocks routing. To setup clocks safely, cmxgcr register needs locking, so I just reused ucc_lock since it was used only to protect cmxgcr. The idea behind placing clocks routing functions into the qe_lib is that later we'll hopefully switch to the generic Linux Clock API, thus, for example, FHCI driver may be used for QE and CPM chips without nasty #ifdefs. This patch also fixes QE_USB_RESTART_TX command definition in the qe.h. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-By: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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committed by
Kumar Gala

parent
83ff9dcf37
commit
5e41486c40
@@ -20,3 +20,7 @@ config UCC
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bool
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default y if UCC_FAST || UCC_SLOW
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config QE_USB
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bool
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help
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QE USB Host Controller support
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@@ -6,3 +6,4 @@ obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o
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obj-$(CONFIG_UCC) += ucc.o
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obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
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obj-$(CONFIG_UCC_FAST) += ucc_fast.o
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obj-$(CONFIG_QE_USB) += usb.o
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@@ -26,7 +26,8 @@
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#include <asm/qe.h>
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#include <asm/ucc.h>
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static DEFINE_SPINLOCK(ucc_lock);
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DEFINE_SPINLOCK(cmxgcr_lock);
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EXPORT_SYMBOL(cmxgcr_lock);
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int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
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{
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@@ -35,10 +36,10 @@ int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
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if (ucc_num > UCC_MAX_NUM - 1)
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return -EINVAL;
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spin_lock_irqsave(&ucc_lock, flags);
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spin_lock_irqsave(&cmxgcr_lock, flags);
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clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG,
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ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT);
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spin_unlock_irqrestore(&ucc_lock, flags);
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spin_unlock_irqrestore(&cmxgcr_lock, flags);
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return 0;
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}
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55
arch/powerpc/sysdev/qe_lib/usb.c
Normal file
55
arch/powerpc/sysdev/qe_lib/usb.c
Normal file
@@ -0,0 +1,55 @@
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/*
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* QE USB routines
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*
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* Copyright (c) Freescale Semicondutor, Inc. 2006.
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* Shlomi Gridish <gridish@freescale.com>
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* Jerry Huang <Chang-Ming.Huang@freescale.com>
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* Copyright (c) MontaVista Software, Inc. 2008.
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <asm/immap_qe.h>
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#include <asm/qe.h>
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int qe_usb_clock_set(enum qe_clock clk, int rate)
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{
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struct qe_mux __iomem *mux = &qe_immr->qmx;
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unsigned long flags;
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u32 val;
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switch (clk) {
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case QE_CLK3: val = QE_CMXGCR_USBCS_CLK3; break;
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case QE_CLK5: val = QE_CMXGCR_USBCS_CLK5; break;
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case QE_CLK7: val = QE_CMXGCR_USBCS_CLK7; break;
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case QE_CLK9: val = QE_CMXGCR_USBCS_CLK9; break;
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case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break;
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case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break;
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case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break;
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case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break;
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case QE_BRG9: val = QE_CMXGCR_USBCS_BRG9; break;
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case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break;
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default:
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pr_err("%s: requested unknown clock %d\n", __func__, clk);
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return -EINVAL;
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}
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if (qe_clock_is_brg(clk))
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qe_setbrg(clk, rate, 1);
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spin_lock_irqsave(&cmxgcr_lock, flags);
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clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val);
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spin_unlock_irqrestore(&cmxgcr_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(qe_usb_clock_set);
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