Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner: "Rather large, but nothing exiting: - new range check for settimeofday() to prevent that boot time becomes negative. - fix for file time rounding - a few simplifications of the hrtimer code - fix for the proc/timerlist code so the output of clock realtime timers is accurate - more y2038 work - tree wide conversion of clockevent drivers to the new callbacks" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (88 commits) hrtimer: Handle failure of tick_init_highres() gracefully hrtimer: Unconfuse switch_hrtimer_base() a bit hrtimer: Simplify get_target_base() by returning current base hrtimer: Drop return code of hrtimer_switch_to_hres() time: Introduce timespec64_to_jiffies()/jiffies_to_timespec64() time: Introduce current_kernel_time64() time: Introduce struct itimerspec64 time: Add the common weak version of update_persistent_clock() time: Always make sure wall_to_monotonic isn't positive time: Fix nanosecond file time rounding in timespec_trunc() timer_list: Add the base offset so remaining nsecs are accurate for non monotonic timers cris/time: Migrate to new 'set-state' interface kernel: broadcast-hrtimer: Migrate to new 'set-state' interface xtensa/time: Migrate to new 'set-state' interface unicore/time: Migrate to new 'set-state' interface um/time: Migrate to new 'set-state' interface sparc/time: Migrate to new 'set-state' interface sh/localtimer: Migrate to new 'set-state' interface score/time: Migrate to new 'set-state' interface s390/time: Migrate to new 'set-state' interface ...
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@@ -190,40 +190,42 @@ static int ttc_set_next_event(unsigned long cycles,
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}
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/**
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* ttc_set_mode - Sets the mode of timer
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* ttc_set_{shutdown|oneshot|periodic} - Sets the state of timer
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*
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* @mode: Mode to be set
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* @evt: Address of clock event instance
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**/
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static void ttc_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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static int ttc_shutdown(struct clock_event_device *evt)
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{
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struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt);
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struct ttc_timer *timer = &ttce->ttc;
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u32 ctrl_reg;
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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ttc_set_interval(timer, DIV_ROUND_CLOSEST(ttce->ttc.freq,
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PRESCALE * HZ));
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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ctrl_reg = readl_relaxed(timer->base_addr +
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TTC_CNT_CNTRL_OFFSET);
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ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK;
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writel_relaxed(ctrl_reg,
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timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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break;
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case CLOCK_EVT_MODE_RESUME:
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ctrl_reg = readl_relaxed(timer->base_addr +
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TTC_CNT_CNTRL_OFFSET);
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ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK;
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writel_relaxed(ctrl_reg,
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timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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break;
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}
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ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK;
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writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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return 0;
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}
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static int ttc_set_periodic(struct clock_event_device *evt)
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{
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struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt);
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struct ttc_timer *timer = &ttce->ttc;
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ttc_set_interval(timer,
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DIV_ROUND_CLOSEST(ttce->ttc.freq, PRESCALE * HZ));
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return 0;
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}
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static int ttc_resume(struct clock_event_device *evt)
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{
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struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt);
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struct ttc_timer *timer = &ttce->ttc;
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u32 ctrl_reg;
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ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK;
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writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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return 0;
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}
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static int ttc_rate_change_clocksource_cb(struct notifier_block *nb,
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@@ -429,7 +431,10 @@ static void __init ttc_setup_clockevent(struct clk *clk,
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ttcce->ce.name = "ttc_clockevent";
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ttcce->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
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ttcce->ce.set_next_event = ttc_set_next_event;
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ttcce->ce.set_mode = ttc_set_mode;
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ttcce->ce.set_state_shutdown = ttc_shutdown;
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ttcce->ce.set_state_periodic = ttc_set_periodic;
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ttcce->ce.set_state_oneshot = ttc_shutdown;
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ttcce->ce.tick_resume = ttc_resume;
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ttcce->ce.rating = 200;
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ttcce->ce.irq = irq;
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ttcce->ce.cpumask = cpu_possible_mask;
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