ASoC: rt5677: add GPIO IRQ support

This allows to enable Mic Jack detection feature

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Modified-by: Anatol Pomozov <anatol.pomozov@gmail.com>
Signed-off-by: Anatol Pomozov <anatol.pomozov@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Oder Chiou
2014-10-16 11:24:26 -07:00
committed by Mark Brown
parent ac884fc47b
commit 5e3363ad1b
4 changed files with 200 additions and 0 deletions

View File

@@ -1368,6 +1368,48 @@
#define RT5677_SEL_SRC_IB01 (0x1 << 0)
#define RT5677_SEL_SRC_IB01_SFT 0
/* Jack Detect Control 1 (0xb5) */
#define RT5677_SEL_GPIO_JD1_MASK (0x3 << 14)
#define RT5677_SEL_GPIO_JD1_SFT 14
#define RT5677_SEL_GPIO_JD2_MASK (0x3 << 12)
#define RT5677_SEL_GPIO_JD2_SFT 12
#define RT5677_SEL_GPIO_JD3_MASK (0x3 << 10)
#define RT5677_SEL_GPIO_JD3_SFT 10
/* IRQ Control 1 (0xbd) */
#define RT5677_STA_GPIO_JD1 (0x1 << 15)
#define RT5677_STA_GPIO_JD1_SFT 15
#define RT5677_EN_IRQ_GPIO_JD1 (0x1 << 14)
#define RT5677_EN_IRQ_GPIO_JD1_SFT 14
#define RT5677_EN_GPIO_JD1_STICKY (0x1 << 13)
#define RT5677_EN_GPIO_JD1_STICKY_SFT 13
#define RT5677_INV_GPIO_JD1 (0x1 << 12)
#define RT5677_INV_GPIO_JD1_SFT 12
#define RT5677_STA_GPIO_JD2 (0x1 << 11)
#define RT5677_STA_GPIO_JD2_SFT 11
#define RT5677_EN_IRQ_GPIO_JD2 (0x1 << 10)
#define RT5677_EN_IRQ_GPIO_JD2_SFT 10
#define RT5677_EN_GPIO_JD2_STICKY (0x1 << 9)
#define RT5677_EN_GPIO_JD2_STICKY_SFT 9
#define RT5677_INV_GPIO_JD2 (0x1 << 8)
#define RT5677_INV_GPIO_JD2_SFT 8
#define RT5677_STA_MICBIAS1_OVCD (0x1 << 7)
#define RT5677_STA_MICBIAS1_OVCD_SFT 7
#define RT5677_EN_IRQ_MICBIAS1_OVCD (0x1 << 6)
#define RT5677_EN_IRQ_MICBIAS1_OVCD_SFT 6
#define RT5677_EN_MICBIAS1_OVCD_STICKY (0x1 << 5)
#define RT5677_EN_MICBIAS1_OVCD_STICKY_SFT 5
#define RT5677_INV_MICBIAS1_OVCD (0x1 << 4)
#define RT5677_INV_MICBIAS1_OVCD_SFT 4
#define RT5677_STA_GPIO_JD3 (0x1 << 3)
#define RT5677_STA_GPIO_JD3_SFT 3
#define RT5677_EN_IRQ_GPIO_JD3 (0x1 << 2)
#define RT5677_EN_IRQ_GPIO_JD3_SFT 2
#define RT5677_EN_GPIO_JD3_STICKY (0x1 << 1)
#define RT5677_EN_GPIO_JD3_STICKY_SFT 1
#define RT5677_INV_GPIO_JD3 (0x1 << 0)
#define RT5677_INV_GPIO_JD3_SFT 0
/* GPIO status (0xbf) */
#define RT5677_GPIO6_STATUS_MASK (0x1 << 5)
#define RT5677_GPIO6_STATUS_SFT 5
@@ -1545,6 +1587,12 @@ enum {
RT5677_GPIO_NUM,
};
enum {
RT5677_IRQ_JD1,
RT5677_IRQ_JD2,
RT5677_IRQ_JD3,
};
struct rt5677_priv {
struct snd_soc_codec *codec;
struct rt5677_platform_data pdata;
@@ -1565,6 +1613,7 @@ struct rt5677_priv {
struct gpio_chip gpio_chip;
#endif
bool dsp_vad_en;
struct regmap_irq_chip_data *irq_data;
};
#endif /* __RT5677_H__ */