ARM: mvebu: Add MBus to Armada 370/XP device tree

The Armada 370/XP SoC family has a completely configurable address
space handled by the MBus controller.

This patch introduces the device tree layout of MBus, making the
'soc' node as mbus-compatible.
Since every peripheral/controller is a child of this 'soc' node,
this makes all of them sit behind the mbus, thus describing the
hardware accurately.

A translation entry has been added for the internal-regs mapping.
This can't be done in the common armada-370-xp.dtsi because A370
and AXP have different addressing width.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Ezequiel Garcia
2013-07-26 10:17:57 -03:00
committed by Jason Cooper
parent 38149887ef
commit 5e12a613ce
9 changed files with 23 additions and 16 deletions

View File

@@ -27,9 +27,7 @@
};
soc {
ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
0xf0000000 0 0xf0000000 0x8000000 /* Device Bus, NOR 128MiB */>;
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000>;
internal-regs {
serial@12000 {