e1000e: Disable dynamic clock gating for 82571 per si errata.

82571 and 82572 Errata #13 documents that the Si feature DMA Dynamic
Clock Gating should be disabled, and identifies the workaround of
disabling the feature by EEPROM setting. EEPROM versions that do not
include the recommended workaround have been found in the field, and so
some customers remain at risk. Because the feature DMA Dynamic clock
Gating can be disabled by directly setting the appropriate bit in the
E1000_CTRL_EXT register, this patch overrides the EEPROM setting, and
force-disables the feature.

Signed-off-by: dave graham <david.graham@intel.com>
Acked-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
dave graham
2009-02-10 12:51:41 +00:00
committed by David S. Miller
parent 111b9dc5c9
commit 5df3f0eaf8
2 changed files with 13 additions and 0 deletions

View File

@@ -980,6 +980,18 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
reg |= E1000_PBA_ECC_CORR_EN;
ew32(PBA_ECC, reg);
}
/*
* Workaround for hardware errata.
* Ensure that DMA Dynamic Clock gating is disabled on 82571 and 82572
*/
if ((hw->mac.type == e1000_82571) ||
(hw->mac.type == e1000_82572)) {
reg = er32(CTRL_EXT);
reg &= ~E1000_CTRL_EXT_DMA_DYN_CLK_EN;
ew32(CTRL_EXT, reg);
}
/* PCI-Ex Control Registers */
if (hw->mac.type == e1000_82574) {