Merge tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu into next/soc
Merge "ARM: mvebu: SoC changes for v3.16" from Jason Cooper: mvebu SoC changes for v3.16 - Armada 375/38x coherency support - Armada 375/38x SMP support - mvebu PMSU and CPU reset support - Armada 370/XP cpuidle support - kirkwood remove platform init of audio device - small fixes and cleanup for new SoC (375/38x) Note: - due to complex deps, cpuidle changes Acked by appropriate maintainer for going though arm-soc tree. * tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu: (46 commits) ARM: mvebu: Fix pmsu compilation when ARMv6 is selected ARM: mvebu: conditionalize Armada 375 coherency workaround ARM: mvebu: conditionalize Armada 375 SMP workaround ARM: mvebu: add Armada 375 A0 revision definition ARM: mvebu: initialize mvebu-soc-id earlier ARM: mvebu: fix thermal quirk SoC revision check ARM: Kirkwood: t5325: Remove platform device to instantiate audio ARM: Kirkwood: Remove platform driver for codec ARM: mvebu: Add thermal quirk for the Armada 375 DB board ARM: mvebu: Select HAVE_ARM_TWD only if SMP is enabled ARM: mvebu: fix the name of the parameter used in mvebu_get_soc_id ARM: mvebu: remove unnecessary ifdef around l2x0_of_init ARM: mvebu: register the cpuidle driver for the Armada XP SoCs cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC ARM: mvebu: Register notifier callback for the cpuidle transition ARM: mvebu: refine which files are build in mach-mvebu ARM: mvebu: Add the PMSU related part of the cpu idle functions ARM: mvebu: Allow to power down L2 cache controller in idle mode ARM: mvebu: Low level function to disable HW coherency support ARM: mvebu: Split low level functions to manipulate HW coherency ... Signed-off-by: Olof Johansson <olof@lixom.net>
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@@ -19,6 +19,7 @@
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/cpu.h>
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#include <linux/io.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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@@ -310,7 +311,8 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
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}
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#ifdef CONFIG_SMP
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void armada_mpic_send_doorbell(const struct cpumask *mask, unsigned int irq)
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static void armada_mpic_send_doorbell(const struct cpumask *mask,
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unsigned int irq)
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{
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int cpu;
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unsigned long map = 0;
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@@ -330,7 +332,7 @@ void armada_mpic_send_doorbell(const struct cpumask *mask, unsigned int irq)
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ARMADA_370_XP_SW_TRIG_INT_OFFS);
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}
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void armada_xp_mpic_smp_cpu_init(void)
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static void armada_xp_mpic_smp_cpu_init(void)
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{
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/* Clear pending IPIs */
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writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
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@@ -342,6 +344,20 @@ void armada_xp_mpic_smp_cpu_init(void)
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/* Unmask IPI interrupt */
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writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
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}
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static int armada_xp_mpic_secondary_init(struct notifier_block *nfb,
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unsigned long action, void *hcpu)
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{
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if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
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armada_xp_mpic_smp_cpu_init();
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return NOTIFY_OK;
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}
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static struct notifier_block armada_370_xp_mpic_cpu_notifier = {
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.notifier_call = armada_xp_mpic_secondary_init,
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.priority = 100,
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};
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#endif /* CONFIG_SMP */
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static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
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@@ -497,6 +513,10 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
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if (parent_irq <= 0) {
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irq_set_default_host(armada_370_xp_mpic_domain);
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set_handle_irq(armada_370_xp_handle_irq);
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#ifdef CONFIG_SMP
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set_smp_cross_call(armada_mpic_send_doorbell);
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register_cpu_notifier(&armada_370_xp_mpic_cpu_notifier);
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#endif
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} else {
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irq_set_chained_handler(parent_irq,
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armada_370_xp_mpic_handle_cascade_irq);
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