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power: supply: smb347-charger: Add missing pin control activation

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[ Upstream commit efe2175478d5237949e33c84d9a722fc084b218c ]

Pin control needs to be activated by setting the enable bit, otherwise
hardware rejects all pin changes. Previously this stayed unnoticed on
Nexus 7 because pin control was enabled by default after rebooting from
downstream kernel, which uses driver that enables the bit and charger
registers are non-volatile until power supply (battery) is disconnected.
Configure the pin control enable bit. This fixes the potentially
never-enabled charging on devices that use pin control.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Dmitry Osipenko
2021-07-31 20:38:38 +03:00
committed by Greg Kroah-Hartman
parent 10e759e350
commit 5d59f38c6b
1 changed files with 10 additions and 0 deletions
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10
drivers/power/supply/smb347-charger.c
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@@ -56,6 +56,7 @@
#define CFG_PIN_EN_CTRL_ACTIVE_LOW 0x60 #define CFG_PIN_EN_CTRL_ACTIVE_LOW 0x60
#define CFG_PIN_EN_APSD_IRQ BIT(1) #define CFG_PIN_EN_APSD_IRQ BIT(1)
#define CFG_PIN_EN_CHARGER_ERROR BIT(2) #define CFG_PIN_EN_CHARGER_ERROR BIT(2)
#define CFG_PIN_EN_CTRL BIT(4)
#define CFG_THERM 0x07 #define CFG_THERM 0x07
#define CFG_THERM_SOFT_HOT_COMPENSATION_MASK 0x03 #define CFG_THERM_SOFT_HOT_COMPENSATION_MASK 0x03
#define CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT 0 #define CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT 0
@@ -725,6 +726,15 @@ static int smb347_hw_init(struct smb347_charger *smb)
if (ret < 0) if (ret < 0)
goto fail; goto fail;
/* Activate pin control, making it writable. */
switch (smb->enable_control) {
case SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW:
case SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH:
ret = regmap_set_bits(smb->regmap, CFG_PIN, CFG_PIN_EN_CTRL);
if (ret < 0)
goto fail;
}
/* /*
* Make the charging functionality controllable by a write to the * Make the charging functionality controllable by a write to the
* command register unless pin control is specified in the platform * command register unless pin control is specified in the platform