mtd: nand_ids: improve LEGACY_ID_NAND macro a bit
Notice that all the flashes belonging to the "legacy ID" class have 512 bytes NAND page. This means we may simplify the 'LEGACY_ID_NAND()' macro as well as the NAND ID table a little. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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David Woodhouse

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@@ -552,12 +552,11 @@ struct nand_chip {
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/*
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* A helper for defining older NAND chips where the second ID byte fully
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* defined the chip, including the geometry (chip size, eraseblock size, page
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* size).
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* size). All these chips have 512 bytes NAND page size.
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*/
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#define LEGACY_ID_NAND(nm, devid, pagesz, chipsz, erasesz, opts) \
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{ .name = (nm), {{ .dev_id = (devid) }}, .pagesize = (pagesz), \
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.chipsize = (chipsz), .erasesize = (erasesz), \
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.options = (opts) }
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#define LEGACY_ID_NAND(nm, devid, chipsz, erasesz, opts) \
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{ .name = (nm), {{ .dev_id = (devid) }}, .pagesize = 512, \
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.chipsize = (chipsz), .erasesize = (erasesz), .options = (opts) }
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/*
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* A helper for defining newer chips which report their page size and
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