mtd: nand_ids: improve LEGACY_ID_NAND macro a bit

Notice that all the flashes belonging to the "legacy ID" class have 512 bytes
NAND page. This means we may simplify the 'LEGACY_ID_NAND()' macro as well as
the NAND ID table a little.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Artem Bityutskiy
2013-03-19 10:29:26 +02:00
committed by David Woodhouse
parent 92a2645820
commit 5bfa9b71a2
3 changed files with 54 additions and 55 deletions

View File

@@ -552,12 +552,11 @@ struct nand_chip {
/*
* A helper for defining older NAND chips where the second ID byte fully
* defined the chip, including the geometry (chip size, eraseblock size, page
* size).
* size). All these chips have 512 bytes NAND page size.
*/
#define LEGACY_ID_NAND(nm, devid, pagesz, chipsz, erasesz, opts) \
{ .name = (nm), {{ .dev_id = (devid) }}, .pagesize = (pagesz), \
.chipsize = (chipsz), .erasesize = (erasesz), \
.options = (opts) }
#define LEGACY_ID_NAND(nm, devid, chipsz, erasesz, opts) \
{ .name = (nm), {{ .dev_id = (devid) }}, .pagesize = 512, \
.chipsize = (chipsz), .erasesize = (erasesz), .options = (opts) }
/*
* A helper for defining newer chips which report their page size and