Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (171 commits) Blackfin arch: fix bug - BF527 0.2 silicon has different CPUID (DSPID) value Blackfin arch: Enlarge flash partition for kenel for bf533/bf537 boards Blackfin arch: fix bug: kernel crash when enable SDIO host driver Blackfin arch: Print FP at level KERN_NOTICE Blackfin arch: drop ad73311 test code Blackfin arch: update board default configs Blackfin arch: Set PB4 as the default irq for bf548 board v1.4+. Blackfin arch: fix typo in early printk bit size processing Blackfin arch: enable reprogram cclk and sclk for bf518f-ezbrd Blackfin arch: add SDIO host driver platform data Blackfin arch: fix bug - kernel stops at initial console Blackfin arch: fix bug - kernel crash after config IP for ethernet port Blackfin arch: add sdh support for bf518f-ezbrd Blackfin arch: fix bug - kernel detects BF532 incorrectly Blackfin arch: add () to avoid warnings from gcc Blackfin arch: change HWTRACE Kconfig and set it on default Blackfin arch: Clean oprofile build path for blackfin Blackfin arch: remove hardware PM code, oprofile not use it Blackfin arch: rewrite get_sclk()/get_vco() Blackfin arch: cleanup and unify the ins functions ...
This commit is contained in:
@@ -34,9 +34,14 @@ int gdb_bfin_vector = -1;
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#error change the definition of slavecpulocks
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#endif
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#ifdef CONFIG_BFIN_WDT
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# error "Please unselect blackfin watchdog driver before build KGDB."
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#endif
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#define IN_MEM(addr, size, l1_addr, l1_size) \
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({ \
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unsigned long __addr = (unsigned long)(addr); \
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(l1_size && __addr >= l1_addr && __addr + (size) <= l1_addr + l1_size); \
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})
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#define ASYNC_BANK_SIZE \
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(ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \
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ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE)
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void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
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{
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@@ -219,6 +224,7 @@ int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
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if (bfin_type == breakinfo[breakno].type
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&& !breakinfo[breakno].occupied) {
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breakinfo[breakno].occupied = 1;
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breakinfo[breakno].skip = 0;
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breakinfo[breakno].enabled = 1;
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breakinfo[breakno].addr = addr;
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breakinfo[breakno].dataacc = dataacc;
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@@ -363,12 +369,12 @@ void kgdb_passive_cpu_callback(void *info)
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void kgdb_roundup_cpus(unsigned long flags)
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{
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smp_call_function(kgdb_passive_cpu_callback, NULL, 0, 0);
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smp_call_function(kgdb_passive_cpu_callback, NULL, 0);
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}
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void kgdb_roundup_cpu(int cpu, unsigned long flags)
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{
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smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0, 0);
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smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0);
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}
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#endif
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@@ -385,10 +391,8 @@ int kgdb_arch_handle_exception(int vector, int signo,
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struct pt_regs *regs)
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{
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long addr;
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long breakno;
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char *ptr;
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int newPC;
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int wp_status;
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int i;
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switch (remcom_in_buffer[0]) {
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@@ -426,17 +430,6 @@ int kgdb_arch_handle_exception(int vector, int signo,
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kgdb_single_step = i + 1;
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}
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if (vector == VEC_WATCH) {
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wp_status = bfin_read_WPSTAT();
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for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) {
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if (wp_status & (1 << breakno)) {
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breakinfo->skip = 1;
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break;
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}
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}
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bfin_write_WPSTAT(0);
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}
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bfin_correct_hw_break();
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return 0;
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@@ -478,57 +471,32 @@ static int validate_memory_access_address(unsigned long addr, int size)
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return 0;
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if (addr >= SYSMMR_BASE)
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return 0;
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if (addr >= ASYNC_BANK0_BASE
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&& addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
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if (IN_MEM(addr, size, ASYNC_BANK0_BASE, ASYNC_BANK_SIZE))
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return 0;
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if (cpu == 0) {
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if (addr >= L1_SCRATCH_START
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&& (addr + size <= L1_SCRATCH_START + L1_SCRATCH_LENGTH))
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if (IN_MEM(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
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return 0;
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#if L1_CODE_LENGTH != 0
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if (addr >= L1_CODE_START
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&& (addr + size <= L1_CODE_START + L1_CODE_LENGTH))
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if (IN_MEM(addr, size, L1_CODE_START, L1_CODE_LENGTH))
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return 0;
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#endif
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#if L1_DATA_A_LENGTH != 0
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if (addr >= L1_DATA_A_START
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&& (addr + size <= L1_DATA_A_START + L1_DATA_A_LENGTH))
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if (IN_MEM(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
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return 0;
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#endif
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#if L1_DATA_B_LENGTH != 0
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if (addr >= L1_DATA_B_START
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&& (addr + size <= L1_DATA_B_START + L1_DATA_B_LENGTH))
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if (IN_MEM(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
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return 0;
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#endif
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#ifdef CONFIG_SMP
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} else if (cpu == 1) {
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if (addr >= COREB_L1_SCRATCH_START
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&& (addr + size <= COREB_L1_SCRATCH_START
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+ L1_SCRATCH_LENGTH))
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if (IN_MEM(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
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return 0;
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# if L1_CODE_LENGTH != 0
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if (addr >= COREB_L1_CODE_START
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&& (addr + size <= COREB_L1_CODE_START + L1_CODE_LENGTH))
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if (IN_MEM(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH))
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return 0;
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# endif
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# if L1_DATA_A_LENGTH != 0
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if (addr >= COREB_L1_DATA_A_START
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&& (addr + size <= COREB_L1_DATA_A_START + L1_DATA_A_LENGTH))
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if (IN_MEM(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH))
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return 0;
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# endif
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# if L1_DATA_B_LENGTH != 0
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if (addr >= COREB_L1_DATA_B_START
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&& (addr + size <= COREB_L1_DATA_B_START + L1_DATA_B_LENGTH))
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if (IN_MEM(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH))
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return 0;
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# endif
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#endif
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}
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#if L2_LENGTH != 0
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if (addr >= L2_START
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&& addr + size <= L2_START + L2_LENGTH)
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if (IN_MEM(addr, size, L2_START, L2_LENGTH))
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return 0;
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#endif
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return EFAULT;
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}
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@@ -582,12 +550,9 @@ int kgdb_mem2hex(char *mem, char *buf, int count)
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default:
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err = EFAULT;
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}
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} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
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(unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
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} else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
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#ifdef CONFIG_SMP
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|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
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(unsigned int)(mem + count) <=
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COREB_L1_CODE_START + L1_CODE_LENGTH
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|| (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
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#endif
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) {
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/* access L1 instruction SRAM*/
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@@ -658,12 +623,9 @@ int kgdb_ebin2mem(char *buf, char *mem, int count)
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default:
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return EFAULT;
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}
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} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
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(unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH
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} else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
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#ifdef CONFIG_SMP
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|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
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(unsigned int)(mem + count) <=
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COREB_L1_CODE_START + L1_CODE_LENGTH
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|| (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
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#endif
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) {
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/* access L1 instruction SRAM */
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@@ -723,12 +685,9 @@ int kgdb_hex2mem(char *buf, char *mem, int count)
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default:
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return EFAULT;
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}
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} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
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(unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
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} else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
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#ifdef CONFIG_SMP
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|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
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(unsigned int)(mem + count) <=
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COREB_L1_CODE_START + L1_CODE_LENGTH
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|| (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
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#endif
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) {
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/* access L1 instruction SRAM */
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@@ -745,24 +704,16 @@ int kgdb_validate_break_address(unsigned long addr)
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if (addr >= 0x1000 && (addr + BREAK_INSTR_SIZE) <= physical_mem_end)
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return 0;
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if (addr >= ASYNC_BANK0_BASE
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&& addr + BREAK_INSTR_SIZE <= ASYNC_BANK3_BASE + ASYNC_BANK3_BASE)
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if (IN_MEM(addr, BREAK_INSTR_SIZE, ASYNC_BANK0_BASE, ASYNC_BANK_SIZE))
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return 0;
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#if L1_CODE_LENGTH != 0
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if (cpu == 0 && addr >= L1_CODE_START
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&& addr + BREAK_INSTR_SIZE <= L1_CODE_START + L1_CODE_LENGTH)
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if (cpu == 0 && IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH))
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return 0;
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# ifdef CONFIG_SMP
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else if (cpu == 1 && addr >= COREB_L1_CODE_START
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&& addr + BREAK_INSTR_SIZE <= COREB_L1_CODE_START + L1_CODE_LENGTH)
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return 0;
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# endif
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#endif
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#if L2_LENGTH != 0
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if (addr >= L2_START
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&& addr + BREAK_INSTR_SIZE <= L2_START + L2_LENGTH)
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#ifdef CONFIG_SMP
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else if (cpu == 1 && IN_MEM(addr, BREAK_INSTR_SIZE, COREB_L1_CODE_START, L1_CODE_LENGTH))
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return 0;
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#endif
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if (IN_MEM(addr, BREAK_INSTR_SIZE, L2_START, L2_LENGTH))
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return 0;
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return EFAULT;
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}
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@@ -772,13 +723,9 @@ int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr)
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int err;
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int cpu = raw_smp_processor_id();
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if ((cpu == 0 && (unsigned int)addr >= L1_CODE_START
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&& (unsigned int)(addr + BREAK_INSTR_SIZE)
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< L1_CODE_START + L1_CODE_LENGTH)
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if ((cpu == 0 && IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH))
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#ifdef CONFIG_SMP
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|| (cpu == 1 && (unsigned int)addr >= COREB_L1_CODE_START
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&& (unsigned int)(addr + BREAK_INSTR_SIZE)
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< COREB_L1_CODE_START + L1_CODE_LENGTH)
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|| (cpu == 1 && IN_MEM(addr, BREAK_INSTR_SIZE, COREB_L1_CODE_START, L1_CODE_LENGTH))
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#endif
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) {
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/* access L1 instruction SRAM */
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@@ -804,9 +751,7 @@ int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr)
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int kgdb_arch_remove_breakpoint(unsigned long addr, char *bundle)
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{
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if ((unsigned int)addr >= L1_CODE_START &&
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(unsigned int)(addr + BREAK_INSTR_SIZE) <
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L1_CODE_START + L1_CODE_LENGTH) {
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if (IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH)) {
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/* access L1 instruction SRAM */
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if (dma_memcpy((void *)addr, bundle, BREAK_INSTR_SIZE) == NULL)
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return -EFAULT;
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