ath10k: Set DMA address mask to 35 bit for WCN3990
WCN3990 is a 37-bit target but can address memory range only upto 35 bits. The 36th bit is used to control the smmu/iommu translation and the 37th bit is used by the internal bus masters to access the wifi subsystem internal SRAM. With the DMA mask set to 37i-bit, the host driver can get 37-bit dma address, which leads to incorrect address access in the target. Hence the host driver can used addresses upto 35-bit for WCN3990. Fix the dma mask for wcn3990 to 35-bit, instead of 37-bit. Tested HW: WCN3990 Tested FW: WLAN.HL.2.0-01188-QCAHLSWMTPLZ-1 Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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committed by
Kalle Valo

parent
fc6a652155
commit
5b9030cee1
@@ -318,9 +318,11 @@ static struct ath10k_hw_ce_ctrl1_upd wcn3990_ctrl1_upd = {
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};
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const struct ath10k_hw_ce_regs wcn3990_ce_regs = {
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.sr_base_addr = 0x00000000,
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.sr_base_addr_lo = 0x00000000,
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.sr_base_addr_hi = 0x00000004,
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.sr_size_addr = 0x00000008,
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.dr_base_addr = 0x0000000c,
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.dr_base_addr_lo = 0x0000000c,
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.dr_base_addr_hi = 0x00000010,
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.dr_size_addr = 0x00000014,
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.misc_ie_addr = 0x00000034,
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.sr_wr_index_addr = 0x0000003c,
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@@ -464,9 +466,9 @@ static struct ath10k_hw_ce_dst_src_wm_regs qcax_wm_dst_ring = {
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};
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const struct ath10k_hw_ce_regs qcax_ce_regs = {
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.sr_base_addr = 0x00000000,
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.sr_base_addr_lo = 0x00000000,
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.sr_size_addr = 0x00000004,
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.dr_base_addr = 0x00000008,
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.dr_base_addr_lo = 0x00000008,
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.dr_size_addr = 0x0000000c,
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.ce_cmd_addr = 0x00000018,
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.misc_ie_addr = 0x00000034,
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