[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 3
The attached patches provides part 3 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Chris Zankel
committed by
Linus Torvalds
Linus Torvalds
parent
4bedea9454
commit
5a0015d626
563
arch/xtensa/kernel/pci.c
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563
arch/xtensa/kernel/pci.c
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@@ -0,0 +1,563 @@
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/*
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* arch/xtensa/pcibios.c
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*
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* PCI bios-type initialisation for PCI machines
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Copyright (C) 2001-2005 Tensilica Inc.
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*
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* Based largely on work from Cort (ppc/kernel/pci.c)
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* IO functions copied from sparc.
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*
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* Chris Zankel <chris@zankel.net>
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*
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/errno.h>
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#include <linux/bootmem.h>
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#include <asm/pci-bridge.h>
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#include <asm/platform.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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/* PCI Controller */
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/*
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* pcibios_alloc_controller
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* pcibios_enable_device
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* pcibios_fixups
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* pcibios_align_resource
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* pcibios_fixup_bus
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* pcibios_setup
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* pci_bus_add_device
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* pci_mmap_page_range
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*/
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struct pci_controller* pci_ctrl_head;
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struct pci_controller** pci_ctrl_tail = &pci_ctrl_head;
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static int pci_bus_count;
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static void pcibios_fixup_resources(struct pci_dev* dev);
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#if 0 // FIXME
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struct pci_fixup pcibios_fixups[] = {
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{ DECLARE_PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources },
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{ 0 }
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};
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#endif
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void
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pcibios_update_resource(struct pci_dev *dev, struct resource *root,
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struct resource *res, int resource)
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{
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u32 new, check, mask;
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int reg;
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struct pci_controller* pci_ctrl = dev->sysdata;
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new = res->start;
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if (pci_ctrl && res->flags & IORESOURCE_IO) {
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new -= pci_ctrl->io_space.base;
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}
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new |= (res->flags & PCI_REGION_FLAG_MASK);
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if (resource < 6) {
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reg = PCI_BASE_ADDRESS_0 + 4*resource;
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} else if (resource == PCI_ROM_RESOURCE) {
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res->flags |= PCI_ROM_ADDRESS_ENABLE;
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reg = dev->rom_base_reg;
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} else {
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/* Somebody might have asked allocation of a non-standard resource */
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return;
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}
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pci_write_config_dword(dev, reg, new);
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pci_read_config_dword(dev, reg, &check);
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mask = (new & PCI_BASE_ADDRESS_SPACE_IO) ?
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PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK;
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if ((new ^ check) & mask) {
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printk(KERN_ERR "PCI: Error while updating region "
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"%s/%d (%08x != %08x)\n", dev->slot_name, resource,
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new, check);
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}
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}
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/*
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* We need to avoid collisions with `mirrored' VGA ports
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* and other strange ISA hardware, so we always want the
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* addresses to be allocated in the 0x000-0x0ff region
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* modulo 0x400.
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*
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* Why? Because some silly external IO cards only decode
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* the low 10 bits of the IO address. The 0x00-0xff region
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* is reserved for motherboard devices that decode all 16
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* bits, so it's ok to allocate at, say, 0x2800-0x28ff,
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* but we want to try to avoid allocating at 0x2900-0x2bff
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* which might have be mirrored at 0x0100-0x03ff..
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*/
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void
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pcibios_align_resource(void *data, struct resource *res, unsigned long size,
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unsigned long align)
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{
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struct pci_dev *dev = data;
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if (res->flags & IORESOURCE_IO) {
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unsigned long start = res->start;
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if (size > 0x100) {
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printk(KERN_ERR "PCI: I/O Region %s/%d too large"
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" (%ld bytes)\n", dev->slot_name,
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dev->resource - res, size);
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}
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if (start & 0x300) {
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start = (start + 0x3ff) & ~0x3ff;
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res->start = start;
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}
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}
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}
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int
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pcibios_enable_resources(struct pci_dev *dev, int mask)
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{
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u16 cmd, old_cmd;
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int idx;
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struct resource *r;
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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old_cmd = cmd;
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for(idx=0; idx<6; idx++) {
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r = &dev->resource[idx];
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if (!r->start && r->end) {
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printk (KERN_ERR "PCI: Device %s not available because "
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"of resource collisions\n", dev->slot_name);
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return -EINVAL;
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}
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if (r->flags & IORESOURCE_IO)
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cmd |= PCI_COMMAND_IO;
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if (r->flags & IORESOURCE_MEM)
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cmd |= PCI_COMMAND_MEMORY;
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}
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if (dev->resource[PCI_ROM_RESOURCE].start)
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cmd |= PCI_COMMAND_MEMORY;
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if (cmd != old_cmd) {
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printk("PCI: Enabling device %s (%04x -> %04x)\n",
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dev->slot_name, old_cmd, cmd);
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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}
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return 0;
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}
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struct pci_controller * __init pcibios_alloc_controller(void)
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{
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struct pci_controller *pci_ctrl;
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pci_ctrl = (struct pci_controller *)alloc_bootmem(sizeof(*pci_ctrl));
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memset(pci_ctrl, 0, sizeof(struct pci_controller));
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*pci_ctrl_tail = pci_ctrl;
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pci_ctrl_tail = &pci_ctrl->next;
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return pci_ctrl;
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}
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static int __init pcibios_init(void)
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{
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struct pci_controller *pci_ctrl;
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struct pci_bus *bus;
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int next_busno = 0, i;
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printk("PCI: Probing PCI hardware\n");
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/* Scan all of the recorded PCI controllers. */
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for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
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pci_ctrl->last_busno = 0xff;
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bus = pci_scan_bus(pci_ctrl->first_busno, pci_ctrl->ops,
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pci_ctrl);
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if (pci_ctrl->io_resource.flags) {
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unsigned long offs;
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offs = (unsigned long)pci_ctrl->io_space.base;
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pci_ctrl->io_resource.start += offs;
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pci_ctrl->io_resource.end += offs;
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bus->resource[0] = &pci_ctrl->io_resource;
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}
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for (i = 0; i < 3; ++i)
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if (pci_ctrl->mem_resources[i].flags)
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bus->resource[i+1] =&pci_ctrl->mem_resources[i];
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pci_ctrl->bus = bus;
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pci_ctrl->last_busno = bus->subordinate;
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if (next_busno <= pci_ctrl->last_busno)
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next_busno = pci_ctrl->last_busno+1;
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}
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pci_bus_count = next_busno;
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return platform_pcibios_fixup();
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}
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subsys_initcall(pcibios_init);
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void __init pcibios_fixup_bus(struct pci_bus *bus)
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{
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struct pci_controller *pci_ctrl = bus->sysdata;
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struct resource *res;
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unsigned long io_offset;
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int i;
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io_offset = (unsigned long)pci_ctrl->io_space.base;
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if (bus->parent == NULL) {
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/* this is a host bridge - fill in its resources */
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pci_ctrl->bus = bus;
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bus->resource[0] = res = &pci_ctrl->io_resource;
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if (!res->flags) {
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if (io_offset)
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printk (KERN_ERR "I/O resource not set for host"
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" bridge %d\n", pci_ctrl->index);
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res->start = 0;
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res->end = IO_SPACE_LIMIT;
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res->flags = IORESOURCE_IO;
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}
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res->start += io_offset;
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res->end += io_offset;
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for (i = 0; i < 3; i++) {
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res = &pci_ctrl->mem_resources[i];
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if (!res->flags) {
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if (i > 0)
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continue;
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printk(KERN_ERR "Memory resource not set for "
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"host bridge %d\n", pci_ctrl->index);
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res->start = 0;
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res->end = ~0U;
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res->flags = IORESOURCE_MEM;
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}
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bus->resource[i+1] = res;
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}
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} else {
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/* This is a subordinate bridge */
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pci_read_bridge_bases(bus);
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for (i = 0; i < 4; i++) {
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if ((res = bus->resource[i]) == NULL || !res->flags)
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continue;
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if (io_offset && (res->flags & IORESOURCE_IO)) {
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res->start += io_offset;
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res->end += io_offset;
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}
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}
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}
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}
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char __init *pcibios_setup(char *str)
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{
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return str;
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}
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/* the next one is stolen from the alpha port... */
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void __init
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pcibios_update_irq(struct pci_dev *dev, int irq)
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{
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
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}
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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u16 cmd, old_cmd;
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int idx;
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struct resource *r;
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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old_cmd = cmd;
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for (idx=0; idx<6; idx++) {
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r = &dev->resource[idx];
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if (!r->start && r->end) {
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printk(KERN_ERR "PCI: Device %s not available because "
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"of resource collisions\n", dev->slot_name);
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return -EINVAL;
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}
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if (r->flags & IORESOURCE_IO)
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cmd |= PCI_COMMAND_IO;
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if (r->flags & IORESOURCE_MEM)
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cmd |= PCI_COMMAND_MEMORY;
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}
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if (cmd != old_cmd) {
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printk("PCI: Enabling device %s (%04x -> %04x)\n",
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dev->slot_name, old_cmd, cmd);
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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}
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return 0;
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}
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#ifdef CONFIG_PROC_FS
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/*
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* Return the index of the PCI controller for device pdev.
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*/
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int
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pci_controller_num(struct pci_dev *dev)
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{
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struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata;
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return pci_ctrl->index;
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}
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#endif /* CONFIG_PROC_FS */
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static void
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pcibios_fixup_resources(struct pci_dev *dev)
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{
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struct pci_controller* pci_ctrl = (struct pci_controller *)dev->sysdata;
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int i;
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unsigned long offset;
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if (!pci_ctrl) {
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printk(KERN_ERR "No pci_ctrl for PCI dev %s!\n",dev->slot_name);
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return;
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}
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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struct resource *res = dev->resource + i;
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if (!res->start || !res->flags)
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continue;
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if (res->end == 0xffffffff) {
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DBG("PCI:%s Resource %d [%08lx-%08lx] is unassigned\n",
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dev->slot_name, i, res->start, res->end);
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res->end -= res->start;
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res->start = 0;
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continue;
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}
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offset = 0;
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if (res->flags & IORESOURCE_IO)
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offset = (unsigned long) pci_ctrl->io_space.base;
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else if (res->flags & IORESOURCE_MEM)
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offset = (unsigned long) pci_ctrl->mem_space.base;
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if (offset != 0) {
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res->start += offset;
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res->end += offset;
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#ifdef DEBUG
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printk("Fixup res %d (%lx) of dev %s: %lx -> %lx\n",
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i, res->flags, dev->slot_name,
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res->start - offset, res->start);
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#endif
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}
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}
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}
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/*
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* Platform support for /proc/bus/pci/X/Y mmap()s,
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* modelled on the sparc64 implementation by Dave Miller.
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* -- paulus.
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*/
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/*
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* Adjust vm_pgoff of VMA such that it is the physical page offset
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* corresponding to the 32-bit pci bus offset for DEV requested by the user.
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*
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* Basically, the user finds the base address for his device which he wishes
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* to mmap. They read the 32-bit value from the config space base register,
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* add whatever PAGE_SIZE multiple offset they wish, and feed this into the
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* offset parameter of mmap on /proc/bus/pci/XXX for that device.
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*
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* Returns negative error code on failure, zero on success.
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*/
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static __inline__ int
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__pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state)
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{
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struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata;
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unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
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unsigned long io_offset = 0;
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int i, res_bit;
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if (pci_ctrl == 0)
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return -EINVAL; /* should never happen */
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/* If memory, add on the PCI bridge address offset */
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if (mmap_state == pci_mmap_mem) {
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res_bit = IORESOURCE_MEM;
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} else {
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io_offset = (unsigned long)pci_ctrl->io_space.base;
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offset += io_offset;
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res_bit = IORESOURCE_IO;
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}
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/*
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* Check that the offset requested corresponds to one of the
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* resources of the device.
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*/
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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struct resource *rp = &dev->resource[i];
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int flags = rp->flags;
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/* treat ROM as memory (should be already) */
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if (i == PCI_ROM_RESOURCE)
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flags |= IORESOURCE_MEM;
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/* Active and same type? */
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if ((flags & res_bit) == 0)
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continue;
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/* In the range of this resource? */
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if (offset < (rp->start & PAGE_MASK) || offset > rp->end)
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continue;
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/* found it! construct the final physical address */
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if (mmap_state == pci_mmap_io)
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offset += pci_ctrl->io_space.start - io_offset;
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vma->vm_pgoff = offset >> PAGE_SHIFT;
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return 0;
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}
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return -EINVAL;
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}
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/*
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* Set vm_flags of VMA, as appropriate for this architecture, for a pci device
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* mapping.
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*/
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static __inline__ void
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__pci_mmap_set_flags(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state)
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{
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vma->vm_flags |= VM_SHM | VM_LOCKED | VM_IO;
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}
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/*
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* Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
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* device mapping.
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*/
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static __inline__ void
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__pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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{
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int prot = pgprot_val(vma->vm_page_prot);
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/* Set to write-through */
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prot &= ~_PAGE_NO_CACHE;
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#if 0
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if (!write_combine)
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prot |= _PAGE_WRITETHRU;
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#endif
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vma->vm_page_prot = __pgprot(prot);
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}
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/*
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* Perform the actual remap of the pages for a PCI device mapping, as
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* appropriate for this architecture. The region in the process to map
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* is described by vm_start and vm_end members of VMA, the base physical
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* address is found in vm_pgoff.
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* The pci device structure is provided so that architectures may make mapping
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* decisions on a per-device or per-bus basis.
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*
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* Returns a negative error code on failure, zero on success.
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*/
|
||||
int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
|
||||
enum pci_mmap_state mmap_state,
|
||||
int write_combine)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = __pci_mmap_make_offset(dev, vma, mmap_state);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
__pci_mmap_set_flags(dev, vma, mmap_state);
|
||||
__pci_mmap_set_pgprot(dev, vma, mmap_state, write_combine);
|
||||
|
||||
ret = io_remap_page_range(vma, vma->vm_start, vma->vm_pgoff<<PAGE_SHIFT,
|
||||
vma->vm_end - vma->vm_start, vma->vm_page_prot);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* This probably belongs here rather than ioport.c because
|
||||
* we do not want this crud linked into SBus kernels.
|
||||
* Also, think for a moment about likes of floppy.c that
|
||||
* include architecture specific parts. They may want to redefine ins/outs.
|
||||
*
|
||||
* We do not use horroble macroses here because we want to
|
||||
* advance pointer by sizeof(size).
|
||||
*/
|
||||
void outsb(unsigned long addr, const void *src, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 1;
|
||||
writeb(*(const char *)src, addr);
|
||||
src += 1;
|
||||
addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void outsw(unsigned long addr, const void *src, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 2;
|
||||
writew(*(const short *)src, addr);
|
||||
src += 2;
|
||||
addr += 2;
|
||||
}
|
||||
}
|
||||
|
||||
void outsl(unsigned long addr, const void *src, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 4;
|
||||
writel(*(const long *)src, addr);
|
||||
src += 4;
|
||||
addr += 4;
|
||||
}
|
||||
}
|
||||
|
||||
void insb(unsigned long addr, void *dst, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 1;
|
||||
*(unsigned char *)dst = readb(addr);
|
||||
dst += 1;
|
||||
addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void insw(unsigned long addr, void *dst, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 2;
|
||||
*(unsigned short *)dst = readw(addr);
|
||||
dst += 2;
|
||||
addr += 2;
|
||||
}
|
||||
}
|
||||
|
||||
void insl(unsigned long addr, void *dst, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 4;
|
||||
/*
|
||||
* XXX I am sure we are in for an unaligned trap here.
|
||||
*/
|
||||
*(unsigned long *)dst = readl(addr);
|
||||
dst += 4;
|
||||
addr += 4;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user