ASoC: codecs: ad193x: Add support to disable on-chip PLL

The on-chip PLL can be disabled if on the MCLKI pin we have an external
clock at 512 x fs. This clock can be used as direct internal clock for
ADCs or DACs.
To support this, we add an extra clock id that can be configured
using the set_sysclk() callback.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cette révision appartient à :
Codrin Ciubotariu
2019-02-18 16:10:36 +00:00
révisé par Mark Brown
Parent bccf9c7e14
révision 5952947375
2 fichiers modifiés avec 33 ajouts et 1 suppressions

Voir le fichier

@@ -31,6 +31,11 @@ int ad193x_probe(struct device *dev, struct regmap *regmap,
#define AD193X_PLL_INPUT_512 (2 << 1)
#define AD193X_PLL_INPUT_768 (3 << 1)
#define AD193X_PLL_CLK_CTRL1 0x01
#define AD193X_PLL_SRC_MASK 0x03
#define AD193X_PLL_DAC_SRC_PLL 0
#define AD193X_PLL_DAC_SRC_MCLK 1
#define AD193X_PLL_CLK_SRC_PLL (0 << 1)
#define AD193X_PLL_CLK_SRC_MCLK (1 << 1)
#define AD193X_DAC_CTRL0 0x02
#define AD193X_DAC_POWERDOWN 0x01
#define AD193X_DAC_SERFMT_MASK 0xC0
@@ -96,4 +101,7 @@ int ad193x_probe(struct device *dev, struct regmap *regmap,
#define AD193X_NUM_REGS 17
#define AD193X_SYSCLK_PLL 0
#define AD193X_SYSCLK_MCLK 1
#endif