soc: qcom: geni: Support for ICC voting
Add necessary macros and structure variables to support ICC BW voting from individual SE drivers. Signed-off-by: Akash Asthana <akashast@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1592908737-7068-2-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Bjorn Andersson

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@@ -6,6 +6,8 @@
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#ifndef _LINUX_QCOM_GENI_SE
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#define _LINUX_QCOM_GENI_SE
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#include <linux/interconnect.h>
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/* Transfer mode supported by GENI Serial Engines */
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enum geni_se_xfer_mode {
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GENI_SE_INVALID,
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@@ -25,6 +27,17 @@ enum geni_se_protocol_type {
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struct geni_wrapper;
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struct clk;
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enum geni_icc_path_index {
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GENI_TO_CORE,
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CPU_TO_GENI,
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GENI_TO_DDR
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};
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struct geni_icc_path {
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struct icc_path *path;
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unsigned int avg_bw;
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};
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/**
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* struct geni_se - GENI Serial Engine
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* @base: Base Address of the Serial Engine's register block
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@@ -33,6 +46,7 @@ struct clk;
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* @clk: Handle to the core serial engine clock
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* @num_clk_levels: Number of valid clock levels in clk_perf_tbl
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* @clk_perf_tbl: Table of clock frequency input to serial engine clock
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* @icc_paths: Array of ICC paths for SE
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*/
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struct geni_se {
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void __iomem *base;
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@@ -41,6 +55,7 @@ struct geni_se {
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struct clk *clk;
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unsigned int num_clk_levels;
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unsigned long *clk_perf_tbl;
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struct geni_icc_path icc_paths[3];
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};
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/* Common SE registers */
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@@ -229,6 +244,21 @@ struct geni_se {
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#define GENI_SE_VERSION_MINOR(ver) ((ver & HW_VER_MINOR_MASK) >> HW_VER_MINOR_SHFT)
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#define GENI_SE_VERSION_STEP(ver) (ver & HW_VER_STEP_MASK)
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/*
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* Define bandwidth thresholds that cause the underlying Core 2X interconnect
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* clock to run at the named frequency. These baseline values are recommended
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* by the hardware team, and are not dynamically scaled with GENI bandwidth
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* beyond basic on/off.
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*/
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#define CORE_2X_19_2_MHZ 960
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#define CORE_2X_50_MHZ 2500
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#define CORE_2X_100_MHZ 5000
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#define CORE_2X_150_MHZ 7500
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#define CORE_2X_200_MHZ 10000
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#define CORE_2X_236_MHZ 16383
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#define GENI_DEFAULT_BW Bps_to_icc(1000)
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#if IS_ENABLED(CONFIG_QCOM_GENI_SE)
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u32 geni_se_get_qup_hw_version(struct geni_se *se);
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@@ -416,5 +446,13 @@ int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len,
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void geni_se_tx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len);
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void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len);
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int geni_icc_get(struct geni_se *se, const char *icc_ddr);
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int geni_icc_set_bw(struct geni_se *se);
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int geni_icc_enable(struct geni_se *se);
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int geni_icc_disable(struct geni_se *se);
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#endif
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#endif
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