drivers: net: cpsw-phy-sel: Add new driver for phy mode selection for cpsw
The cpsw currently lacks code to properly set up the hardware interface mode on AM33xx. Other platforms might be equally affected. Usually, the bootloader will configure the control module register, so probably that's why such support wasn't needed in the past. In suspend mode though, this register is modified, and so it needs reprogramming after resume. This patch adds a new driver in which hardware interface can configure correct register bits when the slave is opened. The AM33xx also has a bit for each slave to configure the RMII reference clock direction. Setting it is now supported by a per-slave DT property. This code path introducted by this patch is currently exclusive for am33xx and same can be extened to various platforms via the DT compatibility property. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
此提交包含在:
@@ -39,4 +39,6 @@ struct cpsw_platform_data {
|
||||
bool dual_emac; /* Enable Dual EMAC mode */
|
||||
};
|
||||
|
||||
void cpsw_phy_sel(struct device *dev, phy_interface_t phy_mode, int slave);
|
||||
|
||||
#endif /* __CPSW_H__ */
|
||||
|
新增問題並參考
封鎖使用者