arm64: dts: mediatek: mt7622: add support for coherent DMA

[ Upstream commit 3abd063019b6a01762f9fccc39505f29d029360a ]

It improves performance by eliminating the need for a cache flush on rx and tx

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: David S. Miller <davem@davemloft.net>
Stable-dep-of: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Felix Fietkau
2022-04-05 21:57:44 +02:00
committed by Greg Kroah-Hartman
parent f993087135
commit 57ff09043f

View File

@@ -357,7 +357,7 @@
}; };
cci_control2: slave-if@5000 { cci_control2: slave-if@5000 {
compatible = "arm,cci-400-ctrl-if"; compatible = "arm,cci-400-ctrl-if", "syscon";
interface-type = "ace"; interface-type = "ace";
reg = <0x5000 0x1000>; reg = <0x5000 0x1000>;
}; };
@@ -937,6 +937,8 @@
power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
mediatek,ethsys = <&ethsys>; mediatek,ethsys = <&ethsys>;
mediatek,sgmiisys = <&sgmiisys>; mediatek,sgmiisys = <&sgmiisys>;
mediatek,cci-control = <&cci_control2>;
dma-coherent;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";