arm/arm64: KVM: Handle out-of-RAM cache maintenance as a NOP
So far, our handling of cache maintenance by VA has been pretty simple: Either the access is in the guest RAM and generates a S2 fault, which results in the page being mapped RW, or we go down the io_mem_abort() path, and nuke the guest. The first one is fine, but the second one is extremely weird. Treating the CM as an I/O is wrong, and nothing in the ARM ARM indicates that we should generate a fault for something that cannot end-up in the cache anyway (even if the guest maps it, it will keep on faulting at stage-2 for emulation). So let's just skip this instruction, and let the guest get away with it. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@@ -138,6 +138,11 @@ static inline bool kvm_vcpu_dabt_iss1tw(struct kvm_vcpu *vcpu)
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return kvm_vcpu_get_hsr(vcpu) & HSR_DABT_S1PTW;
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}
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static inline bool kvm_vcpu_dabt_is_cm(struct kvm_vcpu *vcpu)
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{
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return !!(kvm_vcpu_get_hsr(vcpu) & HSR_DABT_CM);
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}
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/* Get Access Size from a data abort */
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static inline int kvm_vcpu_dabt_get_as(struct kvm_vcpu *vcpu)
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{
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