ath10k: Remove qca98xx hw1.0 support
Since the firmware support is no longer available for hw1.0, drop all code (especially workarounds) for those units. Signed-off-by: Bartosz Markowski <bartosz.markowski@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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committed by
Kalle Valo

parent
c69029b179
commit
57a8930aec
@@ -152,8 +152,7 @@ struct service_to_pipe {
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enum ath10k_pci_features {
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ATH10K_PCI_FEATURE_MSI_X = 0,
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ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND = 1,
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ATH10K_PCI_FEATURE_SOC_POWER_SAVE = 2,
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ATH10K_PCI_FEATURE_SOC_POWER_SAVE = 1,
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/* keep last */
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ATH10K_PCI_FEATURE_COUNT
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@@ -234,9 +233,6 @@ struct ath10k_pci {
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/* Map CE id to ce_state */
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struct ce_state *ce_id_to_state[CE_COUNT_MAX];
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/* makes sure that dummy reads are atomic */
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spinlock_t hw_v1_workaround_lock;
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};
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static inline struct ath10k_pci *ath10k_pci_priv(struct ath10k *ar)
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@@ -310,23 +306,8 @@ static inline void ath10k_pci_write32(struct ath10k *ar, u32 offset,
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u32 value)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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void __iomem *addr = ar_pci->mem;
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if (test_bit(ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND, ar_pci->features)) {
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unsigned long irq_flags;
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spin_lock_irqsave(&ar_pci->hw_v1_workaround_lock, irq_flags);
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ioread32(addr+offset+4); /* 3rd read prior to write */
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ioread32(addr+offset+4); /* 2nd read prior to write */
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ioread32(addr+offset+4); /* 1st read prior to write */
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iowrite32(value, addr+offset);
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spin_unlock_irqrestore(&ar_pci->hw_v1_workaround_lock,
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irq_flags);
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} else {
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iowrite32(value, addr+offset);
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}
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iowrite32(value, ar_pci->mem + offset);
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}
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static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset)
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