[media] tw68: add original tw68 code
This tw68 driver has been out-of-tree for many years on gitorious: https://gitorious.org/tw68/tw68-v2. This copies that code to the kernel as a record of that original code. Note that William Brack's email address in these sources is no longer valid and I have not been able to contact him. However, all the code is standard GPL. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Hans Verkuil
committed by
Mauro Carvalho Chehab
Mauro Carvalho Chehab
parent
89fffac802
commit
5740f4e75f
268
drivers/media/pci/tw68/tw68-risc.c
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268
drivers/media/pci/tw68/tw68-risc.c
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/*
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* tw68_risc.c
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* Part of the device driver for Techwell 68xx based cards
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*
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* Much of this code is derived from the cx88 and sa7134 drivers, which
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* were in turn derived from the bt87x driver. The original work was by
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* Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
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* Hans Verkuil, Andy Walls and many others. Their work is gratefully
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* acknowledged. Full credit goes to them - any problems within this code
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* are mine.
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*
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* Copyright (C) 2009 William M. Brack <wbrack@mmm.com.hk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "tw68.h"
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#define NO_SYNC_LINE (-1U)
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/**
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* @rp pointer to current risc program position
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* @sglist pointer to "scatter-gather list" of buffer pointers
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* @offset offset to target memory buffer
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* @sync_line 0 -> no sync, 1 -> odd sync, 2 -> even sync
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* @bpl number of bytes per scan line
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* @padding number of bytes of padding to add
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* @lines number of lines in field
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* @lpi lines per IRQ, or 0 to not generate irqs
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* Note: IRQ to be generated _after_ lpi lines are transferred
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*/
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static __le32 *tw68_risc_field(__le32 *rp, struct scatterlist *sglist,
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unsigned int offset, u32 sync_line,
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unsigned int bpl, unsigned int padding,
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unsigned int lines, unsigned int lpi)
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{
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struct scatterlist *sg;
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unsigned int line, todo, done;
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/* sync instruction */
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if (sync_line != NO_SYNC_LINE) {
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if (sync_line == 1)
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*(rp++) = cpu_to_le32(RISC_SYNCO);
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else
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*(rp++) = cpu_to_le32(RISC_SYNCE);
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*(rp++) = 0;
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}
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/* scan lines */
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sg = sglist;
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for (line = 0; line < lines; line++) {
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/* calculate next starting position */
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while (offset && offset >= sg_dma_len(sg)) {
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offset -= sg_dma_len(sg);
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sg++;
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}
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if (bpl <= sg_dma_len(sg) - offset) {
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/* fits into current chunk */
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*(rp++) = cpu_to_le32(RISC_LINESTART |
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/* (offset<<12) |*/ bpl);
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*(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
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offset += bpl;
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} else {
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/*
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* scanline needs to be split. Put the start in
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* whatever memory remains using RISC_LINESTART,
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* then the remainder into following addresses
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* given by the scatter-gather list.
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*/
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todo = bpl; /* one full line to be done */
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/* first fragment */
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done = (sg_dma_len(sg) - offset);
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*(rp++) = cpu_to_le32(RISC_LINESTART |
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(7 << 24) |
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done);
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*(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
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todo -= done;
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sg++;
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/* succeeding fragments have no offset */
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while (todo > sg_dma_len(sg)) {
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*(rp++) = cpu_to_le32(RISC_INLINE |
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(done << 12) |
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sg_dma_len(sg));
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*(rp++) = cpu_to_le32(sg_dma_address(sg));
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todo -= sg_dma_len(sg);
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sg++;
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done += sg_dma_len(sg);
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}
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if (todo) {
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/* final chunk - offset 0, count 'todo' */
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*(rp++) = cpu_to_le32(RISC_INLINE |
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(done << 12) |
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todo);
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*(rp++) = cpu_to_le32(sg_dma_address(sg));
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}
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offset = todo;
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}
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offset += padding;
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/* If this line needs an interrupt, put it in */
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if (lpi && line > 0 && !(line % lpi))
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*(rp-2) |= RISC_INT_BIT;
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}
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return rp;
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}
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/**
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* tw68_risc_buffer
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*
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* This routine is called by tw68-video. It allocates
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* memory for the dma controller "program" and then fills in that
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* memory with the appropriate "instructions".
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*
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* @pci_dev structure with info about the pci
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* slot which our device is in.
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* @risc structure with info about the memory
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* used for our controller program.
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* @sglist scatter-gather list entry
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* @top_offset offset within the risc program area for the
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* first odd frame line
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* @bottom_offset offset within the risc program area for the
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* first even frame line
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* @bpl number of data bytes per scan line
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* @padding number of extra bytes to add at end of line
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* @lines number of scan lines
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*/
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int tw68_risc_buffer(struct pci_dev *pci,
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struct btcx_riscmem *risc,
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struct scatterlist *sglist,
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unsigned int top_offset,
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unsigned int bottom_offset,
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unsigned int bpl,
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unsigned int padding,
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unsigned int lines)
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{
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u32 instructions, fields;
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__le32 *rp;
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int rc;
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fields = 0;
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if (UNSET != top_offset)
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fields++;
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if (UNSET != bottom_offset)
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fields++;
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/*
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* estimate risc mem: worst case is one write per page border +
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* one write per scan line + syncs + jump (all 2 dwords).
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* Padding can cause next bpl to start close to a page border.
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* First DMA region may be smaller than PAGE_SIZE
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*/
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instructions = fields * (1 + (((bpl + padding) * lines) /
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PAGE_SIZE) + lines) + 2;
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rc = btcx_riscmem_alloc(pci, risc, instructions * 8);
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if (rc < 0)
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return rc;
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/* write risc instructions */
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rp = risc->cpu;
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if (UNSET != top_offset) /* generates SYNCO */
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rp = tw68_risc_field(rp, sglist, top_offset, 1,
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bpl, padding, lines, 0);
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if (UNSET != bottom_offset) /* generates SYNCE */
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rp = tw68_risc_field(rp, sglist, bottom_offset, 2,
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bpl, padding, lines, 0);
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/* save pointer to jmp instruction address */
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risc->jmp = rp;
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/* assure risc buffer hasn't overflowed */
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BUG_ON((risc->jmp - risc->cpu + 2) * sizeof(*risc->cpu) > risc->size);
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return 0;
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}
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#if 0
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/* ------------------------------------------------------------------ */
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/* debug helper code */
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static void tw68_risc_decode(u32 risc, u32 addr)
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{
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#define RISC_OP(reg) (((reg) >> 28) & 7)
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static struct instr_details {
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char *name;
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u8 has_data_type;
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u8 has_byte_info;
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u8 has_addr;
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} instr[8] = {
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[RISC_OP(RISC_SYNCO)] = {"syncOdd", 0, 0, 0},
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[RISC_OP(RISC_SYNCE)] = {"syncEven", 0, 0, 0},
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[RISC_OP(RISC_JUMP)] = {"jump", 0, 0, 1},
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[RISC_OP(RISC_LINESTART)] = {"lineStart", 1, 1, 1},
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[RISC_OP(RISC_INLINE)] = {"inline", 1, 1, 1},
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};
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u32 p;
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p = RISC_OP(risc);
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if (!(risc & 0x80000000) || !instr[p].name) {
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printk(KERN_DEBUG "0x%08x [ INVALID ]\n", risc);
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return;
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}
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printk(KERN_DEBUG "0x%08x %-9s IRQ=%d",
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risc, instr[p].name, (risc >> 27) & 1);
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if (instr[p].has_data_type)
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printk(KERN_DEBUG " Type=%d", (risc >> 24) & 7);
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if (instr[p].has_byte_info)
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printk(KERN_DEBUG " Start=0x%03x Count=%03u",
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(risc >> 12) & 0xfff, risc & 0xfff);
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if (instr[p].has_addr)
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printk(KERN_DEBUG " StartAddr=0x%08x", addr);
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printk(KERN_DEBUG "\n");
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}
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void tw68_risc_program_dump(struct tw68_core *core,
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struct btcx_riscmem *risc)
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{
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__le32 *addr;
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printk(KERN_DEBUG "%s: risc_program_dump: risc=%p, "
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"risc->cpu=0x%p, risc->jmp=0x%p\n",
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core->name, risc, risc->cpu, risc->jmp);
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for (addr = risc->cpu; addr <= risc->jmp; addr += 2)
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tw68_risc_decode(*addr, *(addr+1));
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}
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EXPORT_SYMBOL_GPL(tw68_risc_program_dump);
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#endif
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/*
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* tw68_risc_stopper
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* Normally, the risc code generated for a buffer ends with a
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* JUMP instruction to direct the DMAP processor to the code for
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* the next buffer. However, when there is no additional buffer
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* currently available, the code instead jumps to this routine.
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*
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* My first try for a "stopper" program was just a simple
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* "jump to self" instruction. Unfortunately, this caused the
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* video FIFO to overflow. My next attempt was to just disable
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* the DMAP processor. Unfortunately, this caused the video
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* decoder to lose its synchronization. The solution to this was to
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* add a "Sync-Odd" instruction, which "eats" all the video data
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* until the start of the next odd field.
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*/
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int tw68_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc)
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{
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__le32 *rp;
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int rc;
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rc = btcx_riscmem_alloc(pci, risc, 8*4);
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if (rc < 0)
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return rc;
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/* write risc inststructions */
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rp = risc->cpu;
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*(rp++) = cpu_to_le32(RISC_SYNCO);
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*(rp++) = 0;
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*(rp++) = cpu_to_le32(RISC_JUMP);
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*(rp++) = cpu_to_le32(risc->dma);
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risc->jmp = risc->cpu;
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return 0;
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}
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