Merge branches 'perf-urgent-for-linus' and 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar: - Leftover AMD PMU driver fix fix from the end of the v3.4 stabilization cycle. - Late tools/perf/ changes that missed the first round: * endianness fixes * event parsing improvements * libtraceevent fixes factored out from trace-cmd * perl scripting engine fixes related to libtraceevent, * testcase improvements * perf inject / pipe mode fixes * plus a kernel side fix * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86: Update event scheduling constraints for AMD family 15h models * 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: Revert "sched, perf: Use a single callback into the scheduler" perf evlist: Show event attribute details perf tools: Bump default sample freq to 4 kHz perf buildid-list: Work better with pipe mode perf tools: Fix piped mode read code perf inject: Fix broken perf inject -b perf tools: rename HEADER_TRACE_INFO to HEADER_TRACING_DATA perf tools: Add union u64_swap type for swapping u64 data perf tools: Carry perf_event_attr bitfield throught different endians perf record: Fix documentation for branch stack sampling perf target: Add cpu flag to sample_type if target has cpu perf tools: Always try to build libtraceevent perf tools: Rename libparsevent to libtraceevent in Makefile perf script: Rename struct event to struct event_format in perl engine perf script: Explicitly handle known default print arg type perf tools: Add hardcoded name term for pmu events perf tools: Separate 'mem:' event scanner bits perf tools: Use allocated list for each parsed event perf tools: Add support for displaying event parser debug info perf test: Move parse event automated tests to separated object
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@@ -496,6 +496,7 @@ static __initconst const struct x86_pmu amd_pmu = {
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* 0x023 DE PERF_CTL[2:0]
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* 0x02D LS PERF_CTL[3]
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* 0x02E LS PERF_CTL[3,0]
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* 0x031 LS PERF_CTL[2:0] (**)
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* 0x043 CU PERF_CTL[2:0]
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* 0x045 CU PERF_CTL[2:0]
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* 0x046 CU PERF_CTL[2:0]
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@@ -509,10 +510,12 @@ static __initconst const struct x86_pmu amd_pmu = {
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* 0x0DD LS PERF_CTL[5:0]
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* 0x0DE LS PERF_CTL[5:0]
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* 0x0DF LS PERF_CTL[5:0]
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* 0x1C0 EX PERF_CTL[5:3]
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* 0x1D6 EX PERF_CTL[5:0]
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* 0x1D8 EX PERF_CTL[5:0]
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*
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* (*) depending on the umask all FPU counters may be used
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* (*) depending on the umask all FPU counters may be used
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* (**) only one unitmask enabled at a time
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*/
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static struct event_constraint amd_f15_PMC0 = EVENT_CONSTRAINT(0, 0x01, 0);
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@@ -562,6 +565,12 @@ amd_get_event_constraints_f15h(struct cpu_hw_events *cpuc, struct perf_event *ev
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return &amd_f15_PMC3;
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case 0x02E:
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return &amd_f15_PMC30;
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case 0x031:
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if (hweight_long(hwc->config & ARCH_PERFMON_EVENTSEL_UMASK) <= 1)
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return &amd_f15_PMC20;
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return &emptyconstraint;
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case 0x1C0:
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return &amd_f15_PMC53;
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default:
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return &amd_f15_PMC50;
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}
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