Merge tag 'iommu-updates-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel: - support for interrupt virtualization in the AMD IOMMU driver. These patches were shared with the KVM tree and are already merged through that tree. - generic DT-binding support for the ARM-SMMU driver. With this the driver now makes use of the generic DMA-API code. This also required some changes outside of the IOMMU code, but these are acked by the respective maintainers. - more cleanups and fixes all over the place. * tag 'iommu-updates-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (40 commits) iommu/amd: No need to wait iommu completion if no dte irq entry change iommu/amd: Free domain id when free a domain of struct dma_ops_domain iommu/amd: Use standard bitmap operation to set bitmap iommu/amd: Clean up the cmpxchg64 invocation iommu/io-pgtable-arm: Check for v7s-incapable systems iommu/dma: Avoid PCI host bridge windows iommu/dma: Add support for mapping MSIs iommu/arm-smmu: Set domain geometry iommu/arm-smmu: Wire up generic configuration support Docs: dt: document ARM SMMU generic binding usage iommu/arm-smmu: Convert to iommu_fwspec iommu/arm-smmu: Intelligent SMR allocation iommu/arm-smmu: Add a stream map entry iterator iommu/arm-smmu: Streamline SMMU data lookups iommu/arm-smmu: Refactor mmu-masters handling iommu/arm-smmu: Keep track of S2CR state iommu/arm-smmu: Consolidate stream map entry state iommu/arm-smmu: Handle stream IDs more dynamically iommu/arm-smmu: Set PRIVCFG in stage 1 STEs iommu/arm-smmu: Support non-PCI devices with SMMUv3 ...
Šī revīzija ir iekļauta:
Linus Torvalds
@@ -26,6 +26,7 @@
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_pci.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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@@ -592,87 +593,16 @@ static u32 __of_msi_map_rid(struct device *dev, struct device_node **np,
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u32 rid_in)
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{
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struct device *parent_dev;
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struct device_node *msi_controller_node;
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struct device_node *msi_np = *np;
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u32 map_mask, masked_rid, rid_base, msi_base, rid_len, phandle;
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int msi_map_len;
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bool matched;
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u32 rid_out = rid_in;
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const __be32 *msi_map = NULL;
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/*
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* Walk up the device parent links looking for one with a
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* "msi-map" property.
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*/
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for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent) {
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if (!parent_dev->of_node)
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continue;
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msi_map = of_get_property(parent_dev->of_node,
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"msi-map", &msi_map_len);
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if (!msi_map)
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continue;
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if (msi_map_len % (4 * sizeof(__be32))) {
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dev_err(parent_dev, "Error: Bad msi-map length: %d\n",
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msi_map_len);
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return rid_out;
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}
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/* We have a good parent_dev and msi_map, let's use them. */
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break;
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}
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if (!msi_map)
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return rid_out;
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/* The default is to select all bits. */
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map_mask = 0xffffffff;
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/*
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* Can be overridden by "msi-map-mask" property. If
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* of_property_read_u32() fails, the default is used.
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*/
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of_property_read_u32(parent_dev->of_node, "msi-map-mask", &map_mask);
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masked_rid = map_mask & rid_in;
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matched = false;
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while (!matched && msi_map_len >= 4 * sizeof(__be32)) {
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rid_base = be32_to_cpup(msi_map + 0);
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phandle = be32_to_cpup(msi_map + 1);
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msi_base = be32_to_cpup(msi_map + 2);
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rid_len = be32_to_cpup(msi_map + 3);
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if (rid_base & ~map_mask) {
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dev_err(parent_dev,
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"Invalid msi-map translation - msi-map-mask (0x%x) ignores rid-base (0x%x)\n",
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map_mask, rid_base);
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return rid_out;
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}
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msi_controller_node = of_find_node_by_phandle(phandle);
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matched = (masked_rid >= rid_base &&
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masked_rid < rid_base + rid_len);
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if (msi_np)
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matched &= msi_np == msi_controller_node;
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if (matched && !msi_np) {
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*np = msi_np = msi_controller_node;
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for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent)
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if (!of_pci_map_rid(parent_dev->of_node, rid_in, "msi-map",
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"msi-map-mask", np, &rid_out))
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break;
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}
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of_node_put(msi_controller_node);
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msi_map_len -= 4 * sizeof(__be32);
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msi_map += 4;
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}
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if (!matched)
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return rid_out;
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rid_out = masked_rid - rid_base + msi_base;
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dev_dbg(dev,
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"msi-map at: %s, using mask %08x, rid-base: %08x, msi-base: %08x, length: %08x, rid: %08x -> %08x\n",
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dev_name(parent_dev), map_mask, rid_base, msi_base,
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rid_len, rid_in, rid_out);
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return rid_out;
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}
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@@ -308,3 +308,105 @@ struct msi_controller *of_pci_find_msi_chip_by_node(struct device_node *of_node)
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EXPORT_SYMBOL_GPL(of_pci_find_msi_chip_by_node);
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#endif /* CONFIG_PCI_MSI */
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/**
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* of_pci_map_rid - Translate a requester ID through a downstream mapping.
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* @np: root complex device node.
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* @rid: PCI requester ID to map.
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* @map_name: property name of the map to use.
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* @map_mask_name: optional property name of the mask to use.
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* @target: optional pointer to a target device node.
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* @id_out: optional pointer to receive the translated ID.
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*
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* Given a PCI requester ID, look up the appropriate implementation-defined
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* platform ID and/or the target device which receives transactions on that
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* ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or
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* @id_out may be NULL if only the other is required. If @target points to
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* a non-NULL device node pointer, only entries targeting that node will be
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* matched; if it points to a NULL value, it will receive the device node of
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* the first matching target phandle, with a reference held.
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*
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* Return: 0 on success or a standard error code on failure.
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*/
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int of_pci_map_rid(struct device_node *np, u32 rid,
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const char *map_name, const char *map_mask_name,
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struct device_node **target, u32 *id_out)
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{
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u32 map_mask, masked_rid;
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int map_len;
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const __be32 *map = NULL;
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if (!np || !map_name || (!target && !id_out))
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return -EINVAL;
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map = of_get_property(np, map_name, &map_len);
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if (!map) {
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if (target)
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return -ENODEV;
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/* Otherwise, no map implies no translation */
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*id_out = rid;
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return 0;
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}
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if (!map_len || map_len % (4 * sizeof(*map))) {
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pr_err("%s: Error: Bad %s length: %d\n", np->full_name,
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map_name, map_len);
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return -EINVAL;
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}
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/* The default is to select all bits. */
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map_mask = 0xffffffff;
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/*
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* Can be overridden by "{iommu,msi}-map-mask" property.
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* If of_property_read_u32() fails, the default is used.
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*/
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if (map_mask_name)
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of_property_read_u32(np, map_mask_name, &map_mask);
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masked_rid = map_mask & rid;
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for ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) {
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struct device_node *phandle_node;
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u32 rid_base = be32_to_cpup(map + 0);
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u32 phandle = be32_to_cpup(map + 1);
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u32 out_base = be32_to_cpup(map + 2);
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u32 rid_len = be32_to_cpup(map + 3);
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if (rid_base & ~map_mask) {
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pr_err("%s: Invalid %s translation - %s-mask (0x%x) ignores rid-base (0x%x)\n",
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np->full_name, map_name, map_name,
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map_mask, rid_base);
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return -EFAULT;
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}
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if (masked_rid < rid_base || masked_rid >= rid_base + rid_len)
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continue;
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phandle_node = of_find_node_by_phandle(phandle);
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if (!phandle_node)
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return -ENODEV;
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if (target) {
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if (*target)
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of_node_put(phandle_node);
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else
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*target = phandle_node;
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if (*target != phandle_node)
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continue;
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}
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if (id_out)
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*id_out = masked_rid - rid_base + out_base;
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pr_debug("%s: %s, using mask %08x, rid-base: %08x, out-base: %08x, length: %08x, rid: %08x -> %08x\n",
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np->full_name, map_name, map_mask, rid_base, out_base,
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rid_len, rid, *id_out);
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return 0;
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}
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pr_err("%s: Invalid %s translation - no match for rid 0x%x on %s\n",
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np->full_name, map_name, rid,
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target && *target ? (*target)->full_name : "any target");
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return -EFAULT;
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||||
}
|
||||
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||||
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