Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh

SuperH updates for 3.3 merge window.

* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: (38 commits)
  sh: magicpanelr2: Update for parse_mtd_partitions() fallout.
  sh: mach-rsk: Update for parse_mtd_partitions() fallout.
  sh: sh2a: Improve cache flush/invalidate functions
  sh: also without PM_RUNTIME pm_runtime.o must be built
  sh: add a resource name for shdma
  sh: Remove redundant try_to_freeze() invocations.
  sh: Ensure IRQs are enabled across do_notify_resume().
  sh: Fix up store queue code for subsys_interface changes.
  sh: clkfwk: sh_clk_init_parent() should be called after clk_register()
  sh: add platform_device for renesas_usbhs in board-sh7757lcr
  sh: modify clock-sh7757 for renesas_usbhs
  sh: pfc: ioremap() support
  sh: use ioread32/iowrite32 and mapped_reg for div6
  sh: use ioread32/iowrite32 and mapped_reg for div4
  sh: use ioread32/iowrite32 and mapped_reg for mstp32
  sh: extend clock struct with mapped_reg member
  sh: clkfwk: clock-sh73a0: all div6_clks use SH_CLK_DIV6_EXT()
  sh: clkfwk: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()
  sh: clock-sh7723: add CLKDEV_ICK_ID for cleanup
  serial: sh-sci: Handle GPIO function requests.
  ...
This commit is contained in:
Linus Torvalds
2012-01-11 23:22:52 -08:00
51 changed files with 892 additions and 1646 deletions

View File

@@ -49,6 +49,10 @@ enum {
#define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
/* SCSPTR, optional */
#define SCSPTR_RTSIO (1 << 7)
#define SCSPTR_CTSIO (1 << 5)
/* Offsets into the sci_port->irqs array */
enum {
SCIx_ERI_IRQ,
@@ -60,6 +64,17 @@ enum {
SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */
};
/* Offsets into the sci_port->gpios array */
enum {
SCIx_SCK,
SCIx_RXD,
SCIx_TXD,
SCIx_CTS,
SCIx_RTS,
SCIx_NR_FNS,
};
enum {
SCIx_PROBE_REGTYPE,
@@ -108,14 +123,21 @@ struct plat_sci_port_ops {
void (*init_pins)(struct uart_port *, unsigned int cflag);
};
/*
* Port-specific capabilities
*/
#define SCIx_HAVE_RTSCTS (1 << 0)
/*
* Platform device specific platform_data struct
*/
struct plat_sci_port {
unsigned long mapbase; /* resource base */
unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
unsigned int gpios[SCIx_NR_FNS]; /* SCK, RXD, TXD, CTS, RTS */
unsigned int type; /* SCI / SCIF / IRDA */
upf_t flags; /* UPF_* flags */
unsigned long capabilities; /* Port features/capabilities */
unsigned int scbrr_algo_id; /* SCBRR calculation algo */
unsigned int scscr; /* SCSCR initialization */

View File

@@ -49,6 +49,7 @@ struct clk {
void __iomem *enable_reg;
unsigned int enable_bit;
void __iomem *mapped_reg;
unsigned long arch_flags;
void *priv;
@@ -131,10 +132,9 @@ int sh_clk_div4_enable_register(struct clk *clks, int nr,
int sh_clk_div4_reparent_register(struct clk *clks, int nr,
struct clk_div4_table *table);
#define SH_CLK_DIV6_EXT(_parent, _reg, _flags, _parents, \
#define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \
_num_parents, _src_shift, _src_width) \
{ \
.parent = _parent, \
.enable_reg = (void __iomem *)_reg, \
.flags = _flags, \
.parent_table = _parents, \
@@ -144,7 +144,11 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
}
#define SH_CLK_DIV6(_parent, _reg, _flags) \
SH_CLK_DIV6_EXT(_parent, _reg, _flags, NULL, 0, 0, 0)
{ \
.parent = _parent, \
.enable_reg = (void __iomem *)_reg, \
.flags = _flags, \
}
int sh_clk_div6_register(struct clk *clks, int nr);
int sh_clk_div6_reparent_register(struct clk *clks, int nr);

View File

@@ -55,6 +55,7 @@ struct pinmux_cfg_reg {
struct pinmux_data_reg {
unsigned long reg, reg_width, reg_shadow;
pinmux_enum_t *enum_ids;
void __iomem *mapped_reg;
};
#define PINMUX_DATA_REG(name, r, r_width) \
@@ -75,6 +76,12 @@ struct pinmux_range {
pinmux_enum_t force;
};
struct pfc_window {
phys_addr_t phys;
void __iomem *virt;
unsigned long size;
};
struct pinmux_info {
char *name;
pinmux_enum_t reserved_id;
@@ -98,6 +105,10 @@ struct pinmux_info {
struct pinmux_irq *gpio_irq;
unsigned int gpio_irq_size;
struct resource *resource;
unsigned int num_resources;
struct pfc_window *window;
struct gpio_chip chip;
};