sh: clkfwk: setup clock parent from current register value
Some clocks can select its parent clock by CPG register. But it might have been modified by boot-loader or something. This patch removed fixed initial parent clock, and setup it from their current register settings. It works on div6 reparent clocks for now. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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committed by
Paul Mundt

parent
a9098b3726
commit
56242a1fc5
@@ -131,10 +131,9 @@ int sh_clk_div4_enable_register(struct clk *clks, int nr,
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int sh_clk_div4_reparent_register(struct clk *clks, int nr,
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struct clk_div4_table *table);
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#define SH_CLK_DIV6_EXT(_parent, _reg, _flags, _parents, \
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#define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \
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_num_parents, _src_shift, _src_width) \
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{ \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_reg, \
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.flags = _flags, \
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.parent_table = _parents, \
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@@ -144,7 +143,11 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
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}
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#define SH_CLK_DIV6(_parent, _reg, _flags) \
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SH_CLK_DIV6_EXT(_parent, _reg, _flags, NULL, 0, 0, 0)
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{ \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_reg, \
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.flags = _flags, \
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}
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int sh_clk_div6_register(struct clk *clks, int nr);
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int sh_clk_div6_reparent_register(struct clk *clks, int nr);
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