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Merge tag 'omap-for-v3.12/dra7xx' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

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From Tony Lindgren:
Minimal DRA7xx based SoC core support via Rajendra Nayak <rnayak@ti.com>

* tag 'omap-for-v3.12/dra7xx' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (849 commits)
  ARM: DRA7: Add the build support in omap2plus
  ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5
  ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs'
  ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512
  ARM: DRA7: board-generic: Add basic DT support
  ARM: DRA7: Resue the clocksource, clockevent support
  ARM: DRA7: Reuse io tables and add a new .init_early
  ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra
  Linux 3.11-rc5
  btrfs: don't loop on large offsets in readdir
  Btrfs: check to see if root_list is empty before adding it to dead roots
  Btrfs: release both paths before logging dir/changed extents
  Btrfs: allow splitting of hole em's when dropping extent cache
  Btrfs: make sure the backref walker catches all refs to our extent
  Btrfs: fix backref walking when we hit a compressed extent
  Btrfs: do not offset physical if we're compressed
  Btrfs: fix extent buffer leak after backref walking
  Btrfs: fix a bug of snapshot-aware defrag to make it work on partial extents
  btrfs: fix file truncation if FALLOC_FL_KEEP_SIZE is specified
  dlm: kill the unnecessary and wrong device_close()->recalc_sigpending()
  ...

Signed-off-by: Kevin Hilman <khilman@linaro.org>
This commit is contained in:
Kevin Hilman
2013-08-19 10:22:10 -07:00
parent f668adebf4 cf470a1b1a
commit 5515d9981f
878 changed files with 12675 additions and 8113 deletions
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27
drivers/pci/host/pci-mvebu.c
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@@ -86,10 +86,6 @@ struct mvebu_sw_pci_bridge {
u16 secondary_status;
u16 membase;
u16 memlimit;
u16 prefmembase;
u16 prefmemlimit;
u32 prefbaseupper;
u32 preflimitupper;
u16 iobaseupper;
u16 iolimitupper;
u8 cappointer;
@@ -420,15 +416,7 @@ static int mvebu_sw_pci_bridge_read(struct mvebu_pcie_port *port,
break;
case PCI_PREF_MEMORY_BASE:
*value = (bridge->prefmemlimit << 16 | bridge->prefmembase);
break;
case PCI_PREF_BASE_UPPER32:
*value = bridge->prefbaseupper;
break;
case PCI_PREF_LIMIT_UPPER32:
*value = bridge->preflimitupper;
*value = 0;
break;
case PCI_IO_BASE_UPPER16:
@@ -502,19 +490,6 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port,
mvebu_pcie_handle_membase_change(port);
break;
case PCI_PREF_MEMORY_BASE:
bridge->prefmembase = value & 0xffff;
bridge->prefmemlimit = value >> 16;
break;
case PCI_PREF_BASE_UPPER32:
bridge->prefbaseupper = value;
break;
case PCI_PREF_LIMIT_UPPER32:
bridge->preflimitupper = value;
break;
case PCI_IO_BASE_UPPER16:
bridge->iobaseupper = value & 0xffff;
bridge->iolimitupper = value >> 16;