Merge tag 'pci-v4.19-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas: - Add Tyrel Datwyler as maintainer for PPC64 RPA hotplug (Tyrel Datwyler) - Add Gustavo Pimentel as DesignWare PCI maintainer (Joao Pinto) - Fix a Switchtec Spectre v1 vulnerability (Gustavo A. R. Silva) - Revert an unnecessary Intel 300 ACS quirk (Mika Westerberg) - Fix pciehp hot-add/powerfault detection that left indicators in wrong state (Keith Busch) - Fix pci_reset_bus() logic error (Dennis Dalessandro) - Revert IB/hfi1 PCI reset change that caused a deadlock (Dennis Dalessandro) - Allow enabling PASID on Root Complex Integrated Endpoints (Felix Kuehling) * tag 'pci-v4.19-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: Fix enabling of PASID on RC integrated endpoints IB/hfi1,PCI: Allow bus reset while probing PCI: Fix faulty logic in pci_reset_bus() PCI: pciehp: Fix hot-add vs powerfault detection order switchtec: Fix Spectre v1 vulnerability Revert "PCI: Add ACS quirk for Intel 300 series" MAINTAINERS: Add Gustavo Pimentel as DesignWare PCI maintainer MAINTAINERS: Add entries for PPC64 RPA PCI hotplug drivers
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@@ -893,14 +893,11 @@ static int trigger_sbr(struct hfi1_devdata *dd)
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}
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/*
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* A secondary bus reset (SBR) issues a hot reset to our device.
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* The following routine does a 1s wait after the reset is dropped
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* per PCI Trhfa (recovery time). PCIe 3.0 section 6.6.1 -
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* Conventional Reset, paragraph 3, line 35 also says that a 1s
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* delay after a reset is required. Per spec requirements,
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* the link is either working or not after that point.
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* This is an end around to do an SBR during probe time. A new API needs
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* to be implemented to have cleaner interface but this fixes the
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* current brokenness
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*/
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return pci_reset_bus(dev);
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return pci_bridge_secondary_bus_reset(dev->bus->self);
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}
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/*
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