MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler

Just like MIPS R2, in MIPS R6 it is possible to determine if a
timer interrupt has happened or not.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
此提交包含在:
Leonid Yegoshin
2014-11-13 13:39:39 +00:00
提交者 Markos Chandras
父節點 180b1e3bfe
當前提交 54dac95083

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@@ -39,7 +39,7 @@ int cp0_timer_irq_installed;
irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
{
const int r2 = cpu_has_mips_r2;
const int r2 = cpu_has_mips_r2_r6;
struct clock_event_device *cd;
int cpu = smp_processor_id();