tools include: Sync kernel ABI headers with tooling headers
Time for a sync with ABI/uapi headers with the upcoming v4.14 kernel. None of the ABI changes require any source code level changes to our existing in-kernel tooling code: - tools/arch/s390/include/uapi/asm/kvm.h: New KVM_S390_VM_TOD_EXT ABI, not used by in-kernel tooling. - tools/arch/x86/include/asm/cpufeatures.h: tools/arch/x86/include/asm/disabled-features.h: New PCID, SME and VGIF x86 CPU feature bits defined. - tools/include/asm-generic/hugetlb_encode.h: tools/include/uapi/asm-generic/mman-common.h: tools/include/uapi/linux/mman.h: Two new madvise() flags, plus a hugetlb system call mmap flags restructuring/extension changes. - tools/include/uapi/drm/drm.h: tools/include/uapi/drm/i915_drm.h: New drm_syncobj_create flags definitions, new drm_syncobj_wait and drm_syncobj_array ABIs. DRM_I915_PERF_* calls and a new I915_PARAM_HAS_EXEC_FENCE_ARRAY ABI for the Intel driver. - tools/include/uapi/linux/bpf.h: New bpf_sock fields (::mark and ::priority), new XDP_REDIRECT action, new kvm_ppc_smmu_info fields (::data_keys, instr_keys) Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Milian Wolff <milian.wolff@kdab.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Taeung Song <treeze.taeung@gmail.com> Cc: Wang Nan <wangnan0@huawei.com> Cc: Yao Jin <yao.jin@linux.intel.com> Link: http://lkml.kernel.org/r/20170913073823.lxmi4c7ejqlfabjx@gmail.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Arnaldo Carvalho de Melo

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@@ -196,6 +196,7 @@
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#define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */
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#define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
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#define X86_FEATURE_SME ( 7*32+10) /* AMD Secure Memory Encryption */
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#define X86_FEATURE_INTEL_PPIN ( 7*32+14) /* Intel Processor Inventory Number */
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#define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */
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@@ -287,6 +288,7 @@
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#define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */
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#define X86_FEATURE_AVIC (15*32+13) /* Virtual Interrupt Controller */
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#define X86_FEATURE_V_VMSAVE_VMLOAD (15*32+15) /* Virtual VMSAVE VMLOAD */
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#define X86_FEATURE_VGIF (15*32+16) /* Virtual GIF */
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/* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
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#define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/
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@@ -21,11 +21,13 @@
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# define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
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# define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
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# define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
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# define DISABLE_PCID 0
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#else
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# define DISABLE_VME 0
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# define DISABLE_K6_MTRR 0
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# define DISABLE_CYRIX_ARR 0
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# define DISABLE_CENTAUR_MCR 0
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# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
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#endif /* CONFIG_X86_64 */
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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@@ -49,7 +51,7 @@
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#define DISABLED_MASK1 0
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#define DISABLED_MASK2 0
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#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
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#define DISABLED_MASK4 0
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#define DISABLED_MASK4 (DISABLE_PCID)
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#define DISABLED_MASK5 0
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#define DISABLED_MASK6 0
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#define DISABLED_MASK7 0
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