Merge tag 'drm-intel-next-2016-10-24' of git://anongit.freedesktop.org/drm-intel into drm-next
- first slice of the gvt device model (Zhenyu et al) - compression support for gpu error states (Chris) - sunset clause on gpu errors resulting in dmesg noise telling users how to report them - .rodata diet from Tvrtko - switch over lots of macros to only take dev_priv (Tvrtko) - underrun suppression for dp link training (Ville) - lspcon (hmdi 2.0 on skl/bxt) support from Shashank Sharma, polish from Jani - gen9 wm fixes from Paulo&Lyude - updated ddi programming for kbl (Rodrigo) - respect alternate aux/ddc pins (from vbt) for all ddi ports (Ville) * tag 'drm-intel-next-2016-10-24' of git://anongit.freedesktop.org/drm-intel: (227 commits) drm/i915: Update DRIVER_DATE to 20161024 drm/i915: Stop setting SNB min-freq-table 0 on powersave setup drm/i915/dp: add lane_count check in intel_dp_check_link_status drm/i915: Fix whitespace issues drm/i915: Clean up DDI DDC/AUX CH sanitation drm/i915: Respect alternate_ddc_pin for all DDI ports drm/i915: Respect alternate_aux_channel for all DDI ports drm/i915/gen9: Remove WaEnableYV12BugFixInHalfSliceChicken7 drm/i915: KBL - Recommended buffer translation programming for DisplayPort drm/i915: Move down skl/kbl ddi iboost and n_edp_entires fixup drm/i915: Add a sunset clause to GPU hang logging drm/i915: Stop reporting error details in dmesg as well as the error-state drm/i915/gvt: do not ignore return value of create_scratch_page drm/i915/gvt: fix spare warnings on odd constant _Bool cast drm/i915/gvt: mark symbols static where possible drm/i915/gvt: fix sparse warnings on different address spaces drm/i915/gvt: properly access enabled intel_engine_cs drm/i915/gvt: Remove defunct vmap_batch() drm/i915/gvt: Use common mapping routines for shadow_bb object drm/i915/gvt: Use common mapping routines for indirect_ctx object ...
This commit is contained in:
@@ -208,6 +208,8 @@ skl_update_plane(struct drm_plane *drm_plane,
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
const int pipe = intel_plane->pipe;
|
||||
const int plane = intel_plane->plane + 1;
|
||||
const struct skl_plane_wm *p_wm =
|
||||
&crtc_state->wm.skl.optimal.planes[plane];
|
||||
u32 plane_ctl;
|
||||
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
|
||||
u32 surf_addr = plane_state->main.offset;
|
||||
@@ -232,7 +234,7 @@ skl_update_plane(struct drm_plane *drm_plane,
|
||||
plane_ctl |= skl_plane_ctl_rotation(rotation);
|
||||
|
||||
if (wm->dirty_pipes & drm_crtc_mask(crtc))
|
||||
skl_write_plane_wm(intel_crtc, wm, plane);
|
||||
skl_write_plane_wm(intel_crtc, p_wm, &wm->ddb, plane);
|
||||
|
||||
if (key->flags) {
|
||||
I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value);
|
||||
@@ -289,6 +291,7 @@ skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
|
||||
struct drm_device *dev = dplane->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct intel_plane *intel_plane = to_intel_plane(dplane);
|
||||
struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
|
||||
const int pipe = intel_plane->pipe;
|
||||
const int plane = intel_plane->plane + 1;
|
||||
|
||||
@@ -298,7 +301,8 @@ skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
|
||||
*/
|
||||
if (!dplane->state->visible)
|
||||
skl_write_plane_wm(to_intel_crtc(crtc),
|
||||
&dev_priv->wm.skl_results, plane);
|
||||
&cstate->wm.skl.optimal.planes[plane],
|
||||
&dev_priv->wm.skl_results.ddb, plane);
|
||||
|
||||
I915_WRITE(PLANE_CTL(pipe, plane), 0);
|
||||
|
||||
@@ -450,7 +454,7 @@ vlv_update_plane(struct drm_plane *dplane,
|
||||
if (key->flags & I915_SET_COLORKEY_SOURCE)
|
||||
sprctl |= SP_SOURCE_KEY;
|
||||
|
||||
if (IS_CHERRYVIEW(dev) && pipe == PIPE_B)
|
||||
if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
|
||||
chv_update_csc(intel_plane, fb->pixel_format);
|
||||
|
||||
I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);
|
||||
@@ -542,12 +546,12 @@ ivb_update_plane(struct drm_plane *plane,
|
||||
if (fb->modifier[0] == I915_FORMAT_MOD_X_TILED)
|
||||
sprctl |= SPRITE_TILED;
|
||||
|
||||
if (IS_HASWELL(dev) || IS_BROADWELL(dev))
|
||||
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
|
||||
sprctl &= ~SPRITE_TRICKLE_FEED_DISABLE;
|
||||
else
|
||||
sprctl |= SPRITE_TRICKLE_FEED_DISABLE;
|
||||
|
||||
if (IS_HASWELL(dev) || IS_BROADWELL(dev))
|
||||
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
|
||||
sprctl |= SPRITE_PIPE_CSC_ENABLE;
|
||||
|
||||
/* Sizes are 0 based */
|
||||
@@ -566,7 +570,7 @@ ivb_update_plane(struct drm_plane *plane,
|
||||
sprctl |= SPRITE_ROTATE_180;
|
||||
|
||||
/* HSW and BDW does this automagically in hardware */
|
||||
if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) {
|
||||
if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) {
|
||||
x += src_w;
|
||||
y += src_h;
|
||||
}
|
||||
@@ -590,7 +594,7 @@ ivb_update_plane(struct drm_plane *plane,
|
||||
|
||||
/* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET
|
||||
* register */
|
||||
if (IS_HASWELL(dev) || IS_BROADWELL(dev))
|
||||
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
|
||||
I915_WRITE(SPROFFSET(pipe), (y << 16) | x);
|
||||
else if (fb->modifier[0] == I915_FORMAT_MOD_X_TILED)
|
||||
I915_WRITE(SPRTILEOFF(pipe), (y << 16) | x);
|
||||
@@ -680,7 +684,7 @@ ilk_update_plane(struct drm_plane *plane,
|
||||
if (fb->modifier[0] == I915_FORMAT_MOD_X_TILED)
|
||||
dvscntr |= DVS_TILED;
|
||||
|
||||
if (IS_GEN6(dev))
|
||||
if (IS_GEN6(dev_priv))
|
||||
dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */
|
||||
|
||||
/* Sizes are 0 based */
|
||||
@@ -753,7 +757,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
|
||||
struct intel_crtc_state *crtc_state,
|
||||
struct intel_plane_state *state)
|
||||
{
|
||||
struct drm_device *dev = plane->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->dev);
|
||||
struct drm_crtc *crtc = state->base.crtc;
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
struct intel_plane *intel_plane = to_intel_plane(plane);
|
||||
@@ -797,7 +801,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
|
||||
}
|
||||
|
||||
/* setup can_scale, min_scale, max_scale */
|
||||
if (INTEL_INFO(dev)->gen >= 9) {
|
||||
if (INTEL_GEN(dev_priv) >= 9) {
|
||||
/* use scaler when colorkey is not required */
|
||||
if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
|
||||
can_scale = 1;
|
||||
@@ -913,7 +917,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
|
||||
|
||||
width_bytes = ((src_x * cpp) & 63) + src_w * cpp;
|
||||
|
||||
if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 ||
|
||||
if (INTEL_GEN(dev_priv) < 9 && (src_w > 2048 || src_h > 2048 ||
|
||||
width_bytes > 4096 || fb->pitches[0] > 4096)) {
|
||||
DRM_DEBUG_KMS("Source dimensions exceed hardware limits\n");
|
||||
return -EINVAL;
|
||||
@@ -932,7 +936,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
|
||||
dst->y1 = crtc_y;
|
||||
dst->y2 = crtc_y + crtc_h;
|
||||
|
||||
if (INTEL_GEN(dev) >= 9) {
|
||||
if (INTEL_GEN(dev_priv) >= 9) {
|
||||
ret = skl_check_plane_surface(state);
|
||||
if (ret)
|
||||
return ret;
|
||||
@@ -944,6 +948,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
|
||||
int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct drm_intel_sprite_colorkey *set = data;
|
||||
struct drm_plane *plane;
|
||||
struct drm_plane_state *plane_state;
|
||||
@@ -955,7 +960,7 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
|
||||
if ((set->flags & (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE)) == (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE))
|
||||
return -EINVAL;
|
||||
|
||||
if ((IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) &&
|
||||
if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
|
||||
set->flags & I915_SET_COLORKEY_DESTINATION)
|
||||
return -EINVAL;
|
||||
|
||||
@@ -1040,6 +1045,7 @@ static uint32_t skl_plane_formats[] = {
|
||||
int
|
||||
intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct intel_plane *intel_plane = NULL;
|
||||
struct intel_plane_state *state = NULL;
|
||||
unsigned long possible_crtcs;
|
||||
@@ -1072,7 +1078,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
|
||||
intel_plane->update_plane = ilk_update_plane;
|
||||
intel_plane->disable_plane = ilk_disable_plane;
|
||||
|
||||
if (IS_GEN6(dev)) {
|
||||
if (IS_GEN6(dev_priv)) {
|
||||
plane_formats = snb_plane_formats;
|
||||
num_plane_formats = ARRAY_SIZE(snb_plane_formats);
|
||||
} else {
|
||||
@@ -1083,7 +1089,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
|
||||
|
||||
case 7:
|
||||
case 8:
|
||||
if (IS_IVYBRIDGE(dev)) {
|
||||
if (IS_IVYBRIDGE(dev_priv)) {
|
||||
intel_plane->can_scale = true;
|
||||
intel_plane->max_downscale = 2;
|
||||
} else {
|
||||
@@ -1091,7 +1097,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
|
||||
intel_plane->max_downscale = 1;
|
||||
}
|
||||
|
||||
if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
|
||||
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
|
||||
intel_plane->update_plane = vlv_update_plane;
|
||||
intel_plane->disable_plane = vlv_disable_plane;
|
||||
|
||||
@@ -1120,7 +1126,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
|
||||
goto fail;
|
||||
}
|
||||
|
||||
if (INTEL_GEN(dev) >= 9) {
|
||||
if (INTEL_GEN(dev_priv) >= 9) {
|
||||
supported_rotations =
|
||||
DRM_ROTATE_0 | DRM_ROTATE_90 |
|
||||
DRM_ROTATE_180 | DRM_ROTATE_270;
|
||||
|
Reference in New Issue
Block a user