regulator: ab8500: add support for ab8505
To obtain full AB8505 regulator support, the AB8500 regulator driver first needs to know its register layout and their initialisation values for each. That information is provided via a couple of large data structures which we provide here. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
此提交包含在:
@@ -5,11 +5,15 @@
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*
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* Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
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* Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
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* Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
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*
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* AB8500 peripheral regulators
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*
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* AB8500 supports the following regulators:
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* VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
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*
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* AB8505 supports the following regulators:
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* VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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@@ -92,6 +96,17 @@ static const unsigned int ldo_vaux3_voltages[] = {
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2910000,
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};
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static const int ldo_vaux56_voltages[] = {
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1800000,
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1050000,
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1100000,
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1200000,
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1500000,
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2200000,
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2500000,
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2790000,
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};
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static const unsigned int ldo_vintcore_voltages[] = {
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1200000,
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1225000,
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@@ -589,6 +604,313 @@ static struct ab8500_regulator_info
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},
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};
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/* AB8505 regulator information */
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static struct ab8500_regulator_info
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ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
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/*
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* Variable Voltage Regulators
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* name, min mV, max mV,
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* update bank, reg, mask, enable val
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* volt bank, reg, mask, table, table length
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*/
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[AB8505_LDO_AUX1] = {
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.desc = {
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.name = "LDO-AUX1",
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.ops = &ab8500_regulator_volt_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8500_LDO_AUX1,
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.owner = THIS_MODULE,
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.n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
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},
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.min_uV = 1100000,
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.max_uV = 3300000,
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.load_lp_uA = 5000,
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.update_bank = 0x04,
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.update_reg = 0x09,
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.update_mask = 0x03,
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.update_val = 0x01,
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.update_val_idle = 0x03,
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.update_val_normal = 0x01,
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.voltage_bank = 0x04,
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.voltage_reg = 0x1f,
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.voltage_mask = 0x0f,
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.voltages = ldo_vauxn_voltages,
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.voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
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},
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[AB8505_LDO_AUX2] = {
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.desc = {
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.name = "LDO-AUX2",
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.ops = &ab8500_regulator_volt_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8500_LDO_AUX2,
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.owner = THIS_MODULE,
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.n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
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},
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.min_uV = 1100000,
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.max_uV = 3300000,
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.load_lp_uA = 5000,
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.update_bank = 0x04,
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.update_reg = 0x09,
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.update_mask = 0x0c,
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.update_val = 0x04,
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.update_val_idle = 0x0c,
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.update_val_normal = 0x04,
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.voltage_bank = 0x04,
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.voltage_reg = 0x20,
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.voltage_mask = 0x0f,
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.voltages = ldo_vauxn_voltages,
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.voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
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},
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[AB8505_LDO_AUX3] = {
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.desc = {
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.name = "LDO-AUX3",
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.ops = &ab8500_regulator_volt_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8500_LDO_AUX3,
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.owner = THIS_MODULE,
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.n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
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},
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.min_uV = 1100000,
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.max_uV = 3300000,
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.load_lp_uA = 5000,
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.update_bank = 0x04,
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.update_reg = 0x0a,
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.update_mask = 0x03,
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.update_val = 0x01,
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.update_val_idle = 0x03,
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.update_val_normal = 0x01,
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.voltage_bank = 0x04,
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.voltage_reg = 0x21,
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.voltage_mask = 0x07,
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.voltages = ldo_vaux3_voltages,
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.voltages_len = ARRAY_SIZE(ldo_vaux3_voltages),
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},
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[AB8505_LDO_AUX4] = {
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.desc = {
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.name = "LDO-AUX4",
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.ops = &ab8500_regulator_volt_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB9540_LDO_AUX4,
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.owner = THIS_MODULE,
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.n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
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},
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.min_uV = 1100000,
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.max_uV = 3300000,
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.load_lp_uA = 5000,
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/* values for Vaux4Regu register */
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.update_bank = 0x04,
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.update_reg = 0x2e,
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.update_mask = 0x03,
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.update_val = 0x01,
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.update_val_idle = 0x03,
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.update_val_normal = 0x01,
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/* values for Vaux4SEL register */
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.voltage_bank = 0x04,
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.voltage_reg = 0x2f,
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.voltage_mask = 0x0f,
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.voltages = ldo_vauxn_voltages,
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.voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
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},
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[AB8505_LDO_AUX5] = {
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.desc = {
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.name = "LDO-AUX5",
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.ops = &ab8500_regulator_volt_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8505_LDO_AUX5,
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.owner = THIS_MODULE,
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.n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
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},
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.min_uV = 1050000,
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.max_uV = 2790000,
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.load_lp_uA = 2000,
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/* values for CtrlVaux5 register */
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.update_bank = 0x01,
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.update_reg = 0x55,
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.update_mask = 0x08,
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.update_val = 0x00,
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.update_val_idle = 0x01,
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.update_val_normal = 0x00,
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.voltage_bank = 0x01,
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.voltage_reg = 0x55,
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.voltage_mask = 0x07,
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.voltages = ldo_vaux56_voltages,
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.voltages_len = ARRAY_SIZE(ldo_vaux56_voltages),
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},
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[AB8505_LDO_AUX6] = {
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.desc = {
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.name = "LDO-AUX6",
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.ops = &ab8500_regulator_volt_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8505_LDO_AUX6,
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.owner = THIS_MODULE,
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.n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
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},
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.min_uV = 1050000,
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.max_uV = 2790000,
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.load_lp_uA = 2000,
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/* values for CtrlVaux6 register */
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.update_bank = 0x01,
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.update_reg = 0x56,
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.update_mask = 0x08,
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.update_val = 0x00,
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.update_val_idle = 0x01,
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.update_val_normal = 0x00,
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.voltage_bank = 0x01,
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.voltage_reg = 0x56,
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.voltage_mask = 0x07,
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.voltages = ldo_vaux56_voltages,
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.voltages_len = ARRAY_SIZE(ldo_vaux56_voltages),
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},
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[AB8505_LDO_INTCORE] = {
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.desc = {
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.name = "LDO-INTCORE",
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.ops = &ab8500_regulator_volt_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8500_LDO_INTCORE,
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.owner = THIS_MODULE,
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.n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
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},
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.min_uV = 1100000,
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.max_uV = 3300000,
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.load_lp_uA = 5000,
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.update_bank = 0x03,
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.update_reg = 0x80,
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.update_mask = 0x44,
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.update_val = 0x04,
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.update_val_idle = 0x44,
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.update_val_normal = 0x04,
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.voltage_bank = 0x03,
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.voltage_reg = 0x80,
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.voltage_mask = 0x38,
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.voltages = ldo_vintcore_voltages,
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.voltages_len = ARRAY_SIZE(ldo_vintcore_voltages),
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.voltage_shift = 3,
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},
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/*
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* Fixed Voltage Regulators
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* name, fixed mV,
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* update bank, reg, mask, enable val
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*/
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[AB8505_LDO_ADC] = {
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.desc = {
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.name = "LDO-ADC",
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.ops = &ab8500_regulator_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8505_LDO_ADC,
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.owner = THIS_MODULE,
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.n_voltages = 1,
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},
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.delay = 10000,
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.fixed_uV = 2000000,
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.load_lp_uA = 1000,
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.update_bank = 0x03,
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.update_reg = 0x80,
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.update_mask = 0x82,
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.update_val = 0x02,
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.update_val_idle = 0x82,
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.update_val_normal = 0x02,
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},
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[AB8505_LDO_USB] = {
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.desc = {
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.name = "LDO-USB",
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.ops = &ab8500_regulator_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB9540_LDO_USB,
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.owner = THIS_MODULE,
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.n_voltages = 1,
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},
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.fixed_uV = 3300000,
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.update_bank = 0x03,
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.update_reg = 0x82,
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.update_mask = 0x03,
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.update_val = 0x01,
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.update_val_idle = 0x03,
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.update_val_normal = 0x01,
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},
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[AB8505_LDO_AUDIO] = {
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.desc = {
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.name = "LDO-AUDIO",
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.ops = &ab8500_regulator_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8500_LDO_AUDIO,
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.owner = THIS_MODULE,
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.n_voltages = 1,
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},
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.fixed_uV = 2000000,
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.update_bank = 0x03,
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.update_reg = 0x83,
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.update_mask = 0x02,
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.update_val = 0x02,
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},
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[AB8505_LDO_ANAMIC1] = {
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.desc = {
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.name = "LDO-ANAMIC1",
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.ops = &ab8500_regulator_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8500_LDO_ANAMIC1,
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.owner = THIS_MODULE,
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.n_voltages = 1,
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},
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.fixed_uV = 2050000,
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.update_bank = 0x03,
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.update_reg = 0x83,
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.update_mask = 0x08,
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.update_val = 0x08,
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},
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[AB8505_LDO_ANAMIC2] = {
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.desc = {
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.name = "LDO-ANAMIC2",
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.ops = &ab8500_regulator_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8500_LDO_ANAMIC2,
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.owner = THIS_MODULE,
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.n_voltages = 1,
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},
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.fixed_uV = 2050000,
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.update_bank = 0x03,
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.update_reg = 0x83,
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.update_mask = 0x10,
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.update_val = 0x10,
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},
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[AB8505_LDO_AUX8] = {
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.desc = {
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.name = "LDO-AUX8",
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.ops = &ab8500_regulator_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8505_LDO_AUX8,
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.owner = THIS_MODULE,
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.n_voltages = 1,
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},
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.fixed_uV = 1800000,
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.update_bank = 0x03,
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.update_reg = 0x83,
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.update_mask = 0x04,
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.update_val = 0x04,
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},
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/*
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* Regulators with fixed voltage and normal/idle modes
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*/
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[AB8505_LDO_ANA] = {
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.desc = {
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.name = "LDO-ANA",
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.ops = &ab8500_regulator_mode_ops,
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.type = REGULATOR_VOLTAGE,
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.id = AB8500_LDO_ANA,
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.owner = THIS_MODULE,
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.n_voltages = 1,
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},
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.fixed_uV = 1200000,
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.load_lp_uA = 1000,
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.update_bank = 0x04,
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.update_reg = 0x06,
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.update_mask = 0x0c,
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.update_val = 0x04,
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.update_val_idle = 0x0c,
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.update_val_normal = 0x04,
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},
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};
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/* AB9540 regulator information */
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static struct ab8500_regulator_info
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ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
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@@ -1031,6 +1353,276 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
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REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
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};
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/* AB8505 register init */
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static struct ab8500_reg_init ab8505_reg_init[] = {
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/*
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* 0x03, VarmRequestCtrl
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* 0x0c, VsmpsCRequestCtrl
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* 0x30, VsmpsARequestCtrl
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* 0xc0, VsmpsBRequestCtrl
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*/
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REG_INIT(AB8505_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
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/*
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* 0x03, VsafeRequestCtrl
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* 0x0c, VpllRequestCtrl
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* 0x30, VanaRequestCtrl
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*/
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REG_INIT(AB8505_REGUREQUESTCTRL2, 0x03, 0x04, 0x3f),
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/*
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* 0x30, Vaux1RequestCtrl
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* 0xc0, Vaux2RequestCtrl
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*/
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REG_INIT(AB8505_REGUREQUESTCTRL3, 0x03, 0x05, 0xf0),
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/*
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* 0x03, Vaux3RequestCtrl
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* 0x04, SwHPReq
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*/
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REG_INIT(AB8505_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
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/*
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* 0x01, VsmpsASysClkReq1HPValid
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* 0x02, VsmpsBSysClkReq1HPValid
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* 0x04, VsafeSysClkReq1HPValid
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* 0x08, VanaSysClkReq1HPValid
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* 0x10, VpllSysClkReq1HPValid
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* 0x20, Vaux1SysClkReq1HPValid
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* 0x40, Vaux2SysClkReq1HPValid
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* 0x80, Vaux3SysClkReq1HPValid
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*/
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REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
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/*
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* 0x01, VsmpsCSysClkReq1HPValid
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* 0x02, VarmSysClkReq1HPValid
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* 0x04, VbbSysClkReq1HPValid
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* 0x08, VsmpsMSysClkReq1HPValid
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*/
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REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
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/*
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* 0x01, VsmpsAHwHPReq1Valid
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* 0x02, VsmpsBHwHPReq1Valid
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* 0x04, VsafeHwHPReq1Valid
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* 0x08, VanaHwHPReq1Valid
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* 0x10, VpllHwHPReq1Valid
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* 0x20, Vaux1HwHPReq1Valid
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* 0x40, Vaux2HwHPReq1Valid
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* 0x80, Vaux3HwHPReq1Valid
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*/
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REG_INIT(AB8505_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
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/*
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* 0x08, VsmpsMHwHPReq1Valid
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*/
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REG_INIT(AB8505_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x08),
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/*
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* 0x01, VsmpsAHwHPReq2Valid
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* 0x02, VsmpsBHwHPReq2Valid
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* 0x04, VsafeHwHPReq2Valid
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* 0x08, VanaHwHPReq2Valid
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* 0x10, VpllHwHPReq2Valid
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* 0x20, Vaux1HwHPReq2Valid
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* 0x40, Vaux2HwHPReq2Valid
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* 0x80, Vaux3HwHPReq2Valid
|
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*/
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REG_INIT(AB8505_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
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/*
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* 0x08, VsmpsMHwHPReq2Valid
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*/
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REG_INIT(AB8505_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x08),
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/*
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* 0x01, VsmpsCSwHPReqValid
|
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* 0x02, VarmSwHPReqValid
|
||||
* 0x04, VsmpsASwHPReqValid
|
||||
* 0x08, VsmpsBSwHPReqValid
|
||||
* 0x10, VsafeSwHPReqValid
|
||||
* 0x20, VanaSwHPReqValid
|
||||
* 0x40, VpllSwHPReqValid
|
||||
* 0x80, Vaux1SwHPReqValid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
|
||||
/*
|
||||
* 0x01, Vaux2SwHPReqValid
|
||||
* 0x02, Vaux3SwHPReqValid
|
||||
* 0x20, VsmpsMSwHPReqValid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSWHPREQVALID2, 0x03, 0x0e, 0x23),
|
||||
/*
|
||||
* 0x02, SysClkReq2Valid1
|
||||
* 0x04, SysClkReq3Valid1
|
||||
* 0x08, SysClkReq4Valid1
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0x0e),
|
||||
/*
|
||||
* 0x02, SysClkReq2Valid2
|
||||
* 0x04, SysClkReq3Valid2
|
||||
* 0x08, SysClkReq4Valid2
|
||||
*/
|
||||
REG_INIT(AB8505_REGUSYSCLKREQVALID2, 0x03, 0x10, 0x0e),
|
||||
/*
|
||||
* 0x01, Vaux4SwHPReqValid
|
||||
* 0x02, Vaux4HwHPReq2Valid
|
||||
* 0x04, Vaux4HwHPReq1Valid
|
||||
* 0x08, Vaux4SysClkReq1HPValid
|
||||
*/
|
||||
REG_INIT(AB8505_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
|
||||
/*
|
||||
* 0x02, VadcEna
|
||||
* 0x04, VintCore12Ena
|
||||
* 0x38, VintCore12Sel
|
||||
* 0x40, VintCore12LP
|
||||
* 0x80, VadcLP
|
||||
*/
|
||||
REG_INIT(AB8505_REGUMISC1, 0x03, 0x80, 0xfe),
|
||||
/*
|
||||
* 0x02, VaudioEna
|
||||
* 0x04, VdmicEna
|
||||
* 0x08, Vamic1Ena
|
||||
* 0x10, Vamic2Ena
|
||||
*/
|
||||
REG_INIT(AB8505_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
|
||||
/*
|
||||
* 0x01, Vamic1_dzout
|
||||
* 0x02, Vamic2_dzout
|
||||
*/
|
||||
REG_INIT(AB8505_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
|
||||
/*
|
||||
* 0x03, VsmpsARegu
|
||||
* 0x0c, VsmpsASelCtrl
|
||||
* 0x10, VsmpsAAutoMode
|
||||
* 0x20, VsmpsAPWMMode
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSAREGU, 0x04, 0x03, 0x3f),
|
||||
/*
|
||||
* 0x03, VsmpsBRegu
|
||||
* 0x0c, VsmpsBSelCtrl
|
||||
* 0x10, VsmpsBAutoMode
|
||||
* 0x20, VsmpsBPWMMode
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSBREGU, 0x04, 0x04, 0x3f),
|
||||
/*
|
||||
* 0x03, VsafeRegu
|
||||
* 0x0c, VsafeSelCtrl
|
||||
* 0x10, VsafeAutoMode
|
||||
* 0x20, VsafePWMMode
|
||||
*/
|
||||
REG_INIT(AB8505_VSAFEREGU, 0x04, 0x05, 0x3f),
|
||||
/*
|
||||
* 0x03, VpllRegu (NOTE! PRCMU register bits)
|
||||
* 0x0c, VanaRegu
|
||||
*/
|
||||
REG_INIT(AB8505_VPLLVANAREGU, 0x04, 0x06, 0x0f),
|
||||
/*
|
||||
* 0x03, VextSupply1Regu
|
||||
* 0x0c, VextSupply2Regu
|
||||
* 0x30, VextSupply3Regu
|
||||
* 0x40, ExtSupply2Bypass
|
||||
* 0x80, ExtSupply3Bypass
|
||||
*/
|
||||
REG_INIT(AB8505_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
|
||||
/*
|
||||
* 0x03, Vaux1Regu
|
||||
* 0x0c, Vaux2Regu
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX12REGU, 0x04, 0x09, 0x0f),
|
||||
/*
|
||||
* 0x0f, Vaux3Regu
|
||||
*/
|
||||
REG_INIT(AB8505_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
|
||||
/*
|
||||
* 0x3f, VsmpsASel1
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSASEL1, 0x04, 0x13, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsASel2
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSASEL2, 0x04, 0x14, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsASel3
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSASEL3, 0x04, 0x15, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsBSel1
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSBSEL1, 0x04, 0x17, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsBSel2
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSBSEL2, 0x04, 0x18, 0x3f),
|
||||
/*
|
||||
* 0x3f, VsmpsBSel3
|
||||
*/
|
||||
REG_INIT(AB8505_VSMPSBSEL3, 0x04, 0x19, 0x3f),
|
||||
/*
|
||||
* 0x7f, VsafeSel1
|
||||
*/
|
||||
REG_INIT(AB8505_VSAFESEL1, 0x04, 0x1b, 0x7f),
|
||||
/*
|
||||
* 0x3f, VsafeSel2
|
||||
*/
|
||||
REG_INIT(AB8505_VSAFESEL2, 0x04, 0x1c, 0x7f),
|
||||
/*
|
||||
* 0x3f, VsafeSel3
|
||||
*/
|
||||
REG_INIT(AB8505_VSAFESEL3, 0x04, 0x1d, 0x7f),
|
||||
/*
|
||||
* 0x0f, Vaux1Sel
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX1SEL, 0x04, 0x1f, 0x0f),
|
||||
/*
|
||||
* 0x0f, Vaux2Sel
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX2SEL, 0x04, 0x20, 0x0f),
|
||||
/*
|
||||
* 0x07, Vaux3Sel
|
||||
* 0x30, VRF1Sel
|
||||
*/
|
||||
REG_INIT(AB8505_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
|
||||
/*
|
||||
* 0x03, Vaux4RequestCtrl
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
|
||||
/*
|
||||
* 0x03, Vaux4Regu
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX4REGU, 0x04, 0x2e, 0x03),
|
||||
/*
|
||||
* 0x0f, Vaux4Sel
|
||||
*/
|
||||
REG_INIT(AB8505_VAUX4SEL, 0x04, 0x2f, 0x0f),
|
||||
/*
|
||||
* 0x04, Vaux1Disch
|
||||
* 0x08, Vaux2Disch
|
||||
* 0x10, Vaux3Disch
|
||||
* 0x20, Vintcore12Disch
|
||||
* 0x40, VTVoutDisch
|
||||
* 0x80, VaudioDisch
|
||||
*/
|
||||
REG_INIT(AB8505_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
|
||||
/*
|
||||
* 0x02, VanaDisch
|
||||
* 0x04, VdmicPullDownEna
|
||||
* 0x10, VdmicDisch
|
||||
*/
|
||||
REG_INIT(AB8505_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
|
||||
/*
|
||||
* 0x01, Vaux4Disch
|
||||
*/
|
||||
REG_INIT(AB8505_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
|
||||
/*
|
||||
* 0x07, Vaux5Sel
|
||||
* 0x08, Vaux5LP
|
||||
* 0x10, Vaux5Ena
|
||||
* 0x20, Vaux5Disch
|
||||
* 0x40, Vaux5DisSfst
|
||||
* 0x80, Vaux5DisPulld
|
||||
*/
|
||||
REG_INIT(AB8505_CTRLVAUX5, 0x01, 0x55, 0xff),
|
||||
/*
|
||||
* 0x07, Vaux6Sel
|
||||
* 0x08, Vaux6LP
|
||||
* 0x10, Vaux6Ena
|
||||
* 0x80, Vaux6DisPulld
|
||||
*/
|
||||
REG_INIT(AB8505_CTRLVAUX6, 0x01, 0x56, 0x9f),
|
||||
};
|
||||
|
||||
/* AB9540 register init */
|
||||
static struct ab8500_reg_init ab9540_reg_init[] = {
|
||||
/*
|
||||
@@ -1396,6 +1988,22 @@ static struct of_regulator_match ab8500_regulator_match[] = {
|
||||
{ .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
|
||||
};
|
||||
|
||||
static struct of_regulator_match ab8505_regulator_match[] = {
|
||||
{ .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8505_LDO_AUX1, },
|
||||
{ .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8505_LDO_AUX2, },
|
||||
{ .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8505_LDO_AUX3, },
|
||||
{ .name = "ab8500_ldo_aux4", .driver_data = (void *) AB8505_LDO_AUX4, },
|
||||
{ .name = "ab8500_ldo_aux5", .driver_data = (void *) AB8505_LDO_AUX5, },
|
||||
{ .name = "ab8500_ldo_aux6", .driver_data = (void *) AB8505_LDO_AUX6, },
|
||||
{ .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
|
||||
{ .name = "ab8500_ldo_adc", .driver_data = (void *) AB8505_LDO_ADC, },
|
||||
{ .name = "ab8500_ldo_audio", .driver_data = (void *) AB8505_LDO_AUDIO, },
|
||||
{ .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
|
||||
{ .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
|
||||
{ .name = "ab8500_ldo_aux8", .driver_data = (void *) AB8505_LDO_AUX8, },
|
||||
{ .name = "ab8500_ldo_ana", .driver_data = (void *) AB8505_LDO_ANA, },
|
||||
};
|
||||
|
||||
static struct of_regulator_match ab9540_regulator_match[] = {
|
||||
{ .name = "ab8500_ldo_aux1", .driver_data = (void *) AB9540_LDO_AUX1, },
|
||||
{ .name = "ab8500_ldo_aux2", .driver_data = (void *) AB9540_LDO_AUX2, },
|
||||
@@ -1450,6 +2058,11 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
|
||||
reg_init_size = AB9540_NUM_REGULATOR_REGISTERS;
|
||||
match = ab9540_regulator_match;
|
||||
match_size = ARRAY_SIZE(ab9540_regulator_match)
|
||||
} else if (is_ab8505(ab8500)) {
|
||||
regulator_info = ab8505_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
|
||||
reg_init = ab8505_reg_init;
|
||||
reg_init_size = AB8505_NUM_REGULATOR_REGISTERS;
|
||||
} else {
|
||||
regulator_info = ab8500_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
|
||||
@@ -1543,6 +2156,9 @@ static int ab8500_regulator_remove(struct platform_device *pdev)
|
||||
if (is_ab9540(ab8500)) {
|
||||
regulator_info = ab9540_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
|
||||
} else if (is_ab8505(ab8500)) {
|
||||
regulator_info = ab8505_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
|
||||
} else {
|
||||
regulator_info = ab8500_regulator_info;
|
||||
regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
|
||||
@@ -1601,5 +2217,6 @@ module_exit(ab8500_regulator_exit);
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
|
||||
MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
|
||||
MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
|
||||
MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
|
||||
MODULE_ALIAS("platform:ab8500-regulator");
|
||||
|
新增問題並參考
封鎖使用者