[media] adv7604: Make output format configurable through pad format operations
Replace the dummy video format operations by pad format operations that configure the output format. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Hans Verkuil <hans.verkuil@cisco.com> Tested-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Laurent Pinchart
committed by
Mauro Carvalho Chehab
Mauro Carvalho Chehab
parent
c784b1e2ec
commit
539b33b059
@@ -53,6 +53,28 @@ MODULE_LICENSE("GPL");
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/* ADV7604 system clock frequency */
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#define ADV7604_fsc (28636360)
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#define ADV7604_RGB_OUT (1 << 1)
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#define ADV7604_OP_FORMAT_SEL_8BIT (0 << 0)
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#define ADV7604_OP_FORMAT_SEL_10BIT (1 << 0)
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#define ADV7604_OP_FORMAT_SEL_12BIT (2 << 0)
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#define ADV7604_OP_MODE_SEL_SDR_422 (0 << 5)
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#define ADV7604_OP_MODE_SEL_DDR_422 (1 << 5)
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#define ADV7604_OP_MODE_SEL_SDR_444 (2 << 5)
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#define ADV7604_OP_MODE_SEL_DDR_444 (3 << 5)
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#define ADV7604_OP_MODE_SEL_SDR_422_2X (4 << 5)
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#define ADV7604_OP_MODE_SEL_ADI_CM (5 << 5)
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#define ADV7604_OP_CH_SEL_GBR (0 << 5)
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#define ADV7604_OP_CH_SEL_GRB (1 << 5)
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#define ADV7604_OP_CH_SEL_BGR (2 << 5)
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#define ADV7604_OP_CH_SEL_RGB (3 << 5)
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#define ADV7604_OP_CH_SEL_BRG (4 << 5)
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#define ADV7604_OP_CH_SEL_RBG (5 << 5)
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#define ADV7604_OP_SWAP_CB_CR (1 << 0)
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enum adv7604_type {
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ADV7604,
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ADV7611,
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@@ -63,6 +85,14 @@ struct adv7604_reg_seq {
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u8 val;
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};
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struct adv7604_format_info {
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enum v4l2_mbus_pixelcode code;
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u8 op_ch_sel;
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bool rgb_out;
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bool swap_cb_cr;
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u8 op_format_sel;
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};
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struct adv7604_chip_info {
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enum adv7604_type type;
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@@ -78,6 +108,9 @@ struct adv7604_chip_info {
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unsigned int tdms_lock_mask;
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unsigned int fmt_change_digital_mask;
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const struct adv7604_format_info *formats;
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unsigned int nformats;
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void (*set_termination)(struct v4l2_subdev *sd, bool enable);
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void (*setup_irqs)(struct v4l2_subdev *sd);
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unsigned int (*read_hdmi_pixelclock)(struct v4l2_subdev *sd);
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@@ -101,12 +134,18 @@ struct adv7604_chip_info {
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struct adv7604_state {
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const struct adv7604_chip_info *info;
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struct adv7604_platform_data pdata;
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struct v4l2_subdev sd;
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struct media_pad pads[ADV7604_PAD_MAX];
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unsigned int source_pad;
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struct v4l2_ctrl_handler hdl;
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enum adv7604_pad selected_input;
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struct v4l2_dv_timings timings;
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const struct adv7604_format_info *format;
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struct {
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u8 edid[256];
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u32 present;
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@@ -771,6 +810,93 @@ static void adv7604_write_reg_seq(struct v4l2_subdev *sd,
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adv7604_write_reg(sd, reg_seq[i].reg, reg_seq[i].val);
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}
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/* -----------------------------------------------------------------------------
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* Format helpers
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*/
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static const struct adv7604_format_info adv7604_formats[] = {
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{ V4L2_MBUS_FMT_RGB888_1X24, ADV7604_OP_CH_SEL_RGB, true, false,
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ADV7604_OP_MODE_SEL_SDR_444 | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YUYV8_2X8, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YVYU8_2X8, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YUYV10_2X10, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_10BIT },
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{ V4L2_MBUS_FMT_YVYU10_2X10, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_10BIT },
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{ V4L2_MBUS_FMT_YUYV12_2X12, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_YVYU12_2X12, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_UYVY8_1X16, ADV7604_OP_CH_SEL_RBG, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_VYUY8_1X16, ADV7604_OP_CH_SEL_RBG, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YUYV8_1X16, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YVYU8_1X16, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_UYVY10_1X20, ADV7604_OP_CH_SEL_RBG, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_10BIT },
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{ V4L2_MBUS_FMT_VYUY10_1X20, ADV7604_OP_CH_SEL_RBG, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_10BIT },
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{ V4L2_MBUS_FMT_YUYV10_1X20, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_10BIT },
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{ V4L2_MBUS_FMT_YVYU10_1X20, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_10BIT },
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{ V4L2_MBUS_FMT_UYVY12_1X24, ADV7604_OP_CH_SEL_RBG, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_VYUY12_1X24, ADV7604_OP_CH_SEL_RBG, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_YUYV12_1X24, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_YVYU12_1X24, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_12BIT },
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};
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static const struct adv7604_format_info adv7611_formats[] = {
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{ V4L2_MBUS_FMT_RGB888_1X24, ADV7604_OP_CH_SEL_RGB, true, false,
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ADV7604_OP_MODE_SEL_SDR_444 | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YUYV8_2X8, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YVYU8_2X8, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YUYV12_2X12, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_YVYU12_2X12, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422 | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_UYVY8_1X16, ADV7604_OP_CH_SEL_RBG, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_VYUY8_1X16, ADV7604_OP_CH_SEL_RBG, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YUYV8_1X16, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_YVYU8_1X16, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_8BIT },
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{ V4L2_MBUS_FMT_UYVY12_1X24, ADV7604_OP_CH_SEL_RBG, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_VYUY12_1X24, ADV7604_OP_CH_SEL_RBG, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_YUYV12_1X24, ADV7604_OP_CH_SEL_RGB, false, false,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_12BIT },
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{ V4L2_MBUS_FMT_YVYU12_1X24, ADV7604_OP_CH_SEL_RGB, false, true,
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ADV7604_OP_MODE_SEL_SDR_422_2X | ADV7604_OP_FORMAT_SEL_12BIT },
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};
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static const struct adv7604_format_info *
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adv7604_format_info(struct adv7604_state *state, enum v4l2_mbus_pixelcode code)
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{
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unsigned int i;
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for (i = 0; i < state->info->nformats; ++i) {
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if (state->info->formats[i].code == code)
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return &state->info->formats[i];
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}
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return NULL;
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}
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/* ----------------------------------------------------------------------- */
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static inline bool is_analog_input(struct v4l2_subdev *sd)
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@@ -1720,29 +1846,132 @@ static int adv7604_s_routing(struct v4l2_subdev *sd,
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return 0;
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}
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static int adv7604_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
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enum v4l2_mbus_pixelcode *code)
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{
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if (index)
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return -EINVAL;
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/* Good enough for now */
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*code = V4L2_MBUS_FMT_FIXED;
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return 0;
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}
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static int adv7604_g_mbus_fmt(struct v4l2_subdev *sd,
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struct v4l2_mbus_framefmt *fmt)
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static int adv7604_enum_mbus_code(struct v4l2_subdev *sd,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_mbus_code_enum *code)
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{
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struct adv7604_state *state = to_state(sd);
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fmt->width = state->timings.bt.width;
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fmt->height = state->timings.bt.height;
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fmt->code = V4L2_MBUS_FMT_FIXED;
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fmt->field = V4L2_FIELD_NONE;
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if (state->timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
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fmt->colorspace = (state->timings.bt.height <= 576) ?
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if (code->index >= state->info->nformats)
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return -EINVAL;
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code->code = state->info->formats[code->index].code;
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return 0;
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}
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static void adv7604_fill_format(struct adv7604_state *state,
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struct v4l2_mbus_framefmt *format)
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{
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memset(format, 0, sizeof(*format));
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format->width = state->timings.bt.width;
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format->height = state->timings.bt.height;
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format->field = V4L2_FIELD_NONE;
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if (state->timings.bt.standards & V4L2_DV_BT_STD_CEA861)
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format->colorspace = (state->timings.bt.height <= 576) ?
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V4L2_COLORSPACE_SMPTE170M : V4L2_COLORSPACE_REC709;
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}
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/*
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* Compute the op_ch_sel value required to obtain on the bus the component order
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* corresponding to the selected format taking into account bus reordering
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* applied by the board at the output of the device.
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*
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* The following table gives the op_ch_value from the format component order
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* (expressed as op_ch_sel value in column) and the bus reordering (expressed as
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* adv7604_bus_order value in row).
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*
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* | GBR(0) GRB(1) BGR(2) RGB(3) BRG(4) RBG(5)
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* ----------+-------------------------------------------------
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* RGB (NOP) | GBR GRB BGR RGB BRG RBG
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* GRB (1-2) | BGR RGB GBR GRB RBG BRG
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* RBG (2-3) | GRB GBR BRG RBG BGR RGB
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* BGR (1-3) | RBG BRG RGB BGR GRB GBR
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* BRG (ROR) | BRG RBG GRB GBR RGB BGR
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* GBR (ROL) | RGB BGR RBG BRG GBR GRB
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*/
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static unsigned int adv7604_op_ch_sel(struct adv7604_state *state)
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{
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#define _SEL(a,b,c,d,e,f) { \
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ADV7604_OP_CH_SEL_##a, ADV7604_OP_CH_SEL_##b, ADV7604_OP_CH_SEL_##c, \
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ADV7604_OP_CH_SEL_##d, ADV7604_OP_CH_SEL_##e, ADV7604_OP_CH_SEL_##f }
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#define _BUS(x) [ADV7604_BUS_ORDER_##x]
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static const unsigned int op_ch_sel[6][6] = {
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_BUS(RGB) /* NOP */ = _SEL(GBR, GRB, BGR, RGB, BRG, RBG),
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_BUS(GRB) /* 1-2 */ = _SEL(BGR, RGB, GBR, GRB, RBG, BRG),
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_BUS(RBG) /* 2-3 */ = _SEL(GRB, GBR, BRG, RBG, BGR, RGB),
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_BUS(BGR) /* 1-3 */ = _SEL(RBG, BRG, RGB, BGR, GRB, GBR),
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_BUS(BRG) /* ROR */ = _SEL(BRG, RBG, GRB, GBR, RGB, BGR),
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_BUS(GBR) /* ROL */ = _SEL(RGB, BGR, RBG, BRG, GBR, GRB),
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};
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return op_ch_sel[state->pdata.bus_order][state->format->op_ch_sel >> 5];
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}
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static void adv7604_setup_format(struct adv7604_state *state)
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{
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struct v4l2_subdev *sd = &state->sd;
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io_write_and_or(sd, 0x02, 0xfd,
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state->format->rgb_out ? ADV7604_RGB_OUT : 0);
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io_write(sd, 0x03, state->format->op_format_sel |
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state->pdata.op_format_mode_sel);
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io_write_and_or(sd, 0x04, 0x1f, adv7604_op_ch_sel(state));
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io_write_and_or(sd, 0x05, 0xfe,
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state->format->swap_cb_cr ? ADV7604_OP_SWAP_CB_CR : 0);
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}
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static int adv7604_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_format *format)
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{
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struct adv7604_state *state = to_state(sd);
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if (format->pad != state->source_pad)
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return -EINVAL;
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adv7604_fill_format(state, &format->format);
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if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
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struct v4l2_mbus_framefmt *fmt;
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fmt = v4l2_subdev_get_try_format(fh, format->pad);
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format->format.code = fmt->code;
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} else {
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format->format.code = state->format->code;
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}
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return 0;
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}
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static int adv7604_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_format *format)
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{
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struct adv7604_state *state = to_state(sd);
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const struct adv7604_format_info *info;
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if (format->pad != state->source_pad)
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return -EINVAL;
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info = adv7604_format_info(state, format->format.code);
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if (info == NULL)
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info = adv7604_format_info(state, V4L2_MBUS_FMT_YUYV8_2X8);
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adv7604_fill_format(state, &format->format);
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format->format.code = info->code;
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if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
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struct v4l2_mbus_framefmt *fmt;
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fmt = v4l2_subdev_get_try_format(fh, format->pad);
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fmt->code = format->format.code;
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} else {
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state->format = info;
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adv7604_setup_format(state);
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}
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return 0;
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}
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@@ -2189,13 +2418,12 @@ static const struct v4l2_subdev_video_ops adv7604_video_ops = {
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.query_dv_timings = adv7604_query_dv_timings,
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.enum_dv_timings = adv7604_enum_dv_timings,
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.dv_timings_cap = adv7604_dv_timings_cap,
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.enum_mbus_fmt = adv7604_enum_mbus_fmt,
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.g_mbus_fmt = adv7604_g_mbus_fmt,
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.try_mbus_fmt = adv7604_g_mbus_fmt,
|
||||
.s_mbus_fmt = adv7604_g_mbus_fmt,
|
||||
};
|
||||
|
||||
static const struct v4l2_subdev_pad_ops adv7604_pad_ops = {
|
||||
.enum_mbus_code = adv7604_enum_mbus_code,
|
||||
.get_fmt = adv7604_get_format,
|
||||
.set_fmt = adv7604_set_format,
|
||||
.get_edid = adv7604_get_edid,
|
||||
.set_edid = adv7604_set_edid,
|
||||
};
|
||||
@@ -2264,14 +2492,11 @@ static int adv7604_core_init(struct v4l2_subdev *sd)
|
||||
io_write_and_or(sd, 0x02, 0xf0,
|
||||
pdata->alt_gamma << 3 |
|
||||
pdata->op_656_range << 2 |
|
||||
pdata->rgb_out << 1 |
|
||||
pdata->alt_data_sat << 0);
|
||||
io_write(sd, 0x03, pdata->op_format_sel);
|
||||
io_write_and_or(sd, 0x04, 0x1f, pdata->op_ch_sel << 5);
|
||||
io_write_and_or(sd, 0x05, 0xf0, pdata->blank_data << 3 |
|
||||
pdata->insert_av_codes << 2 |
|
||||
pdata->replicate_av_codes << 1 |
|
||||
pdata->invert_cbcr << 0);
|
||||
io_write_and_or(sd, 0x05, 0xf1, pdata->blank_data << 3 |
|
||||
pdata->insert_av_codes << 2 |
|
||||
pdata->replicate_av_codes << 1);
|
||||
adv7604_setup_format(state);
|
||||
|
||||
cp_write(sd, 0x69, 0x30); /* Enable CP CSC */
|
||||
|
||||
@@ -2439,6 +2664,8 @@ static const struct adv7604_chip_info adv7604_chip_info[] = {
|
||||
.tdms_lock_mask = 0xe0,
|
||||
.cable_det_mask = 0x1e,
|
||||
.fmt_change_digital_mask = 0xc1,
|
||||
.formats = adv7604_formats,
|
||||
.nformats = ARRAY_SIZE(adv7604_formats),
|
||||
.set_termination = adv7604_set_termination,
|
||||
.setup_irqs = adv7604_setup_irqs,
|
||||
.read_hdmi_pixelclock = adv7604_read_hdmi_pixelclock,
|
||||
@@ -2470,6 +2697,8 @@ static const struct adv7604_chip_info adv7604_chip_info[] = {
|
||||
.tdms_lock_mask = 0x43,
|
||||
.cable_det_mask = 0x01,
|
||||
.fmt_change_digital_mask = 0x03,
|
||||
.formats = adv7611_formats,
|
||||
.nformats = ARRAY_SIZE(adv7611_formats),
|
||||
.set_termination = adv7611_set_termination,
|
||||
.setup_irqs = adv7611_setup_irqs,
|
||||
.read_hdmi_pixelclock = adv7611_read_hdmi_pixelclock,
|
||||
@@ -2525,6 +2754,7 @@ static int adv7604_probe(struct i2c_client *client,
|
||||
}
|
||||
state->pdata = *pdata;
|
||||
state->timings = cea640x480;
|
||||
state->format = adv7604_format_info(state, V4L2_MBUS_FMT_YUYV8_2X8);
|
||||
|
||||
sd = &state->sd;
|
||||
v4l2_i2c_subdev_init(sd, client, &adv7604_ops);
|
||||
|
||||
Reference in New Issue
Block a user