Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull more KVM updates from Paolo Bonzini: "The guest side of the asynchronous page fault work has been delayed to 5.9 in order to sync with Thomas's interrupt entry rework, but here's the rest of the KVM updates for this merge window. MIPS: - Loongson port PPC: - Fixes ARM: - Fixes x86: - KVM_SET_USER_MEMORY_REGION optimizations - Fixes - Selftest fixes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (62 commits) KVM: x86: do not pass poisoned hva to __kvm_set_memory_region KVM: selftests: fix sync_with_host() in smm_test KVM: async_pf: Inject 'page ready' event only if 'page not present' was previously injected KVM: async_pf: Cleanup kvm_setup_async_pf() kvm: i8254: remove redundant assignment to pointer s KVM: x86: respect singlestep when emulating instruction KVM: selftests: Don't probe KVM_CAP_HYPERV_ENLIGHTENED_VMCS when nested VMX is unsupported KVM: selftests: do not substitute SVM/VMX check with KVM_CAP_NESTED_STATE check KVM: nVMX: Consult only the "basic" exit reason when routing nested exit KVM: arm64: Move hyp_symbol_addr() to kvm_asm.h KVM: arm64: Synchronize sysreg state on injecting an AArch32 exception KVM: arm64: Make vcpu_cp1x() work on Big Endian hosts KVM: arm64: Remove host_cpu_context member from vcpu structure KVM: arm64: Stop sparse from moaning at __hyp_this_cpu_ptr KVM: arm64: Handle PtrAuth traps early KVM: x86: Unexport x86_fpu_cache and make it static KVM: selftests: Ignore KVM 5-level paging support for VM_MODE_PXXV48_4K KVM: arm64: Save the host's PtrAuth keys in non-preemptible context KVM: arm64: Stop save/restoring ACTLR_EL1 KVM: arm64: Add emulation for 32bit guests accessing ACTLR2 ...
This commit is contained in:
Linus Torvalds
@@ -682,6 +682,9 @@
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#ifndef cpu_guest_has_htw
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#define cpu_guest_has_htw (cpu_data[0].guest.options & MIPS_CPU_HTW)
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#endif
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#ifndef cpu_guest_has_ldpte
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#define cpu_guest_has_ldpte (cpu_data[0].guest.options & MIPS_CPU_LDPTE)
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#endif
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#ifndef cpu_guest_has_mvh
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#define cpu_guest_has_mvh (cpu_data[0].guest.options & MIPS_CPU_MVH)
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#endif
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@@ -23,6 +23,8 @@
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#include <asm/inst.h>
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#include <asm/mipsregs.h>
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#include <kvm/iodev.h>
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/* MIPS KVM register ids */
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#define MIPS_CP0_32(_R, _S) \
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(KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U32 | (8 * (_R) + (_S)))
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@@ -66,9 +68,11 @@
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#define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3)
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#define KVM_REG_MIPS_CP0_CONFIG4 MIPS_CP0_32(16, 4)
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#define KVM_REG_MIPS_CP0_CONFIG5 MIPS_CP0_32(16, 5)
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#define KVM_REG_MIPS_CP0_CONFIG6 MIPS_CP0_32(16, 6)
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#define KVM_REG_MIPS_CP0_CONFIG7 MIPS_CP0_32(16, 7)
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#define KVM_REG_MIPS_CP0_MAARI MIPS_CP0_64(17, 2)
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#define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0)
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#define KVM_REG_MIPS_CP0_DIAG MIPS_CP0_32(22, 0)
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#define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
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#define KVM_REG_MIPS_CP0_KSCRATCH1 MIPS_CP0_64(31, 2)
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#define KVM_REG_MIPS_CP0_KSCRATCH2 MIPS_CP0_64(31, 3)
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@@ -78,8 +82,8 @@
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#define KVM_REG_MIPS_CP0_KSCRATCH6 MIPS_CP0_64(31, 7)
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#define KVM_MAX_VCPUS 8
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#define KVM_USER_MEM_SLOTS 8
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#define KVM_MAX_VCPUS 16
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#define KVM_USER_MEM_SLOTS 16
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/* memory slots that does not exposed to userspace */
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#define KVM_PRIVATE_MEM_SLOTS 0
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@@ -171,6 +175,9 @@ struct kvm_vcpu_stat {
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u64 vz_ghfc_exits;
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u64 vz_gpa_exits;
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u64 vz_resvd_exits;
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#ifdef CONFIG_CPU_LOONGSON64
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u64 vz_cpucfg_exits;
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#endif
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#endif
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u64 halt_successful_poll;
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u64 halt_attempted_poll;
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@@ -183,11 +190,39 @@ struct kvm_vcpu_stat {
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struct kvm_arch_memory_slot {
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};
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#ifdef CONFIG_CPU_LOONGSON64
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struct ipi_state {
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uint32_t status;
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uint32_t en;
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uint32_t set;
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uint32_t clear;
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uint64_t buf[4];
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};
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struct loongson_kvm_ipi;
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struct ipi_io_device {
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int node_id;
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struct loongson_kvm_ipi *ipi;
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struct kvm_io_device device;
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};
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struct loongson_kvm_ipi {
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spinlock_t lock;
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struct kvm *kvm;
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struct ipi_state ipistate[16];
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struct ipi_io_device dev_ipi[4];
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};
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#endif
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struct kvm_arch {
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/* Guest physical mm */
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struct mm_struct gpa_mm;
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/* Mask of CPUs needing GPA ASID flush */
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cpumask_t asid_flush_mask;
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#ifdef CONFIG_CPU_LOONGSON64
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struct loongson_kvm_ipi ipi;
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#endif
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};
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#define N_MIPS_COPROC_REGS 32
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@@ -225,6 +260,7 @@ struct mips_coproc {
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#define MIPS_CP0_WATCH_LO 18
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#define MIPS_CP0_WATCH_HI 19
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#define MIPS_CP0_TLB_XCONTEXT 20
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#define MIPS_CP0_DIAG 22
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#define MIPS_CP0_ECC 26
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#define MIPS_CP0_CACHE_ERR 27
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#define MIPS_CP0_TAG_LO 28
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@@ -276,8 +312,12 @@ enum emulation_result {
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#define MIPS3_PG_SHIFT 6
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#define MIPS3_PG_FRAME 0x3fffffc0
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#if defined(CONFIG_64BIT)
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#define VPN2_MASK GENMASK(cpu_vmbits - 1, 13)
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#else
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#define VPN2_MASK 0xffffe000
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#define KVM_ENTRYHI_ASID MIPS_ENTRYHI_ASID
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#endif
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#define KVM_ENTRYHI_ASID cpu_asid_mask(&boot_cpu_data)
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#define TLB_IS_GLOBAL(x) ((x).tlb_lo[0] & (x).tlb_lo[1] & ENTRYLO_G)
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#define TLB_VPN2(x) ((x).tlb_hi & VPN2_MASK)
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#define TLB_ASID(x) ((x).tlb_hi & KVM_ENTRYHI_ASID)
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@@ -892,6 +932,10 @@ void kvm_vz_save_guesttlb(struct kvm_mips_tlb *buf, unsigned int index,
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unsigned int count);
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void kvm_vz_load_guesttlb(const struct kvm_mips_tlb *buf, unsigned int index,
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unsigned int count);
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#ifdef CONFIG_CPU_LOONGSON64
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void kvm_loongson_clear_guest_vtlb(void);
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void kvm_loongson_clear_guest_ftlb(void);
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#endif
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#endif
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void kvm_mips_suspend_mm(int cpu);
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@@ -1131,6 +1175,8 @@ extern int kvm_mips_trans_mtc0(union mips_instruction inst, u32 *opc,
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/* Misc */
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extern void kvm_mips_dump_stats(struct kvm_vcpu *vcpu);
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extern unsigned long kvm_mips_get_ramsize(struct kvm *kvm);
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extern int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
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struct kvm_mips_interrupt *irq);
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static inline void kvm_arch_hardware_unsetup(void) {}
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static inline void kvm_arch_sync_events(struct kvm *kvm) {}
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@@ -1038,6 +1038,8 @@
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/* Disable Branch Return Cache */
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#define R10K_DIAG_D_BRC (_ULCAST_(1) << 22)
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/* Flush BTB */
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#define LOONGSON_DIAG_BTB (_ULCAST_(1) << 1)
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/* Flush ITLB */
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#define LOONGSON_DIAG_ITLB (_ULCAST_(1) << 2)
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/* Flush DTLB */
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@@ -2874,7 +2876,9 @@ __BUILD_SET_C0(status)
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__BUILD_SET_C0(cause)
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__BUILD_SET_C0(config)
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__BUILD_SET_C0(config5)
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__BUILD_SET_C0(config6)
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__BUILD_SET_C0(config7)
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__BUILD_SET_C0(diag)
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__BUILD_SET_C0(intcontrol)
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__BUILD_SET_C0(intctl)
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__BUILD_SET_C0(srsmap)
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