iommu/amd: Add support for IOMMUv2 domain mode
This patch adds support for protection domains that implement two-level paging for devices. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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@@ -755,6 +755,7 @@ static void __init init_iommu_from_pci(struct amd_iommu *iommu)
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iommu->features = ((u64)high << 32) | low;
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if (iommu_feature(iommu, FEATURE_GT)) {
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int glxval;
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u32 pasids;
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u64 shift;
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@@ -763,6 +764,14 @@ static void __init init_iommu_from_pci(struct amd_iommu *iommu)
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pasids = (1 << shift);
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amd_iommu_max_pasids = min(amd_iommu_max_pasids, pasids);
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glxval = iommu->features & FEATURE_GLXVAL_MASK;
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glxval >>= FEATURE_GLXVAL_SHIFT;
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if (amd_iommu_max_glx_val == -1)
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amd_iommu_max_glx_val = glxval;
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else
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amd_iommu_max_glx_val = min(amd_iommu_max_glx_val, glxval);
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}
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if (iommu_feature(iommu, FEATURE_GT) &&
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