Merge tag 'x86-platform-2020-08-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 platform updates from Ingo Molnar: "The biggest change is the removal of SGI UV1 support, which allowed the removal of the legacy EFI old_mmap code as well. This removes quite a bunch of old code & quirks" * tag 'x86-platform-2020-08-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/efi: Remove unused EFI_UV1_MEMMAP code x86/platform/uv: Remove uv bios and efi code related to EFI_UV1_MEMMAP x86/efi: Remove references to no-longer-used efi_have_uv1_memmap() x86/efi: Delete SGI UV1 detection. x86/platform/uv: Remove efi=old_map command line option x86/platform/uv: Remove vestigial mention of UV1 platform from bios header x86/platform/uv: Remove support for UV1 platform from uv x86/platform/uv: Remove support for uv1 platform from uv_hub x86/platform/uv: Remove support for UV1 platform from uv_bau x86/platform/uv: Remove support for UV1 platform from uv_mmrs x86/platform/uv: Remove support for UV1 platform from x2apic_uv_x x86/platform/uv: Remove support for UV1 platform from uv_tlb x86/platform/uv: Remove support for UV1 platform from uv_time
Этот коммит содержится в:
@@ -24,8 +24,6 @@
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#include <asm/uv/uv.h>
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#include <asm/apic.h>
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static DEFINE_PER_CPU(int, x2apic_extra_bits);
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static enum uv_system_type uv_system_type;
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static int uv_hubbed_system;
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static int uv_hubless_system;
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@@ -40,7 +38,7 @@ static u8 oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
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static struct {
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unsigned int apicid_shift;
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unsigned int apicid_mask;
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unsigned int socketid_shift; /* aka pnode_shift for UV1/2/3 */
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unsigned int socketid_shift; /* aka pnode_shift for UV2/3 */
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unsigned int pnode_mask;
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unsigned int gpa_shift;
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unsigned int gnode_shift;
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@@ -48,8 +46,6 @@ static struct {
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static int uv_min_hub_revision_id;
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unsigned int uv_apicid_hibits;
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static struct apic apic_x2apic_uv_x;
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static struct uv_hub_info_s uv_hub_info_node0;
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@@ -139,12 +135,8 @@ static void __init uv_tsc_check_sync(void)
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/* Accommodate different UV arch BIOSes */
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mmr = uv_early_read_mmr(UVH_TSC_SYNC_MMR);
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mmr_shift =
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is_uv1_hub() ? 0 :
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is_uv2_hub() ? UVH_TSC_SYNC_SHIFT_UV2K : UVH_TSC_SYNC_SHIFT;
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if (mmr_shift)
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sync_state = (mmr >> mmr_shift) & UVH_TSC_SYNC_MASK;
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else
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sync_state = 0;
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sync_state = (mmr >> mmr_shift) & UVH_TSC_SYNC_MASK;
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switch (sync_state) {
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case UVH_TSC_SYNC_VALID:
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@@ -223,21 +215,6 @@ static void __init early_get_apic_socketid_shift(void)
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pr_info("UV: socketid_shift:%d pnode_mask:0x%x\n", uv_cpuid.socketid_shift, uv_cpuid.pnode_mask);
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}
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/*
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* Add an extra bit as dictated by bios to the destination apicid of
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* interrupts potentially passing through the UV HUB. This prevents
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* a deadlock between interrupts and IO port operations.
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*/
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static void __init uv_set_apicid_hibit(void)
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{
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union uv1h_lb_target_physical_apic_id_mask_u apicid_mask;
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if (is_uv1_hub()) {
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apicid_mask.v = uv_early_read_mmr(UV1H_LB_TARGET_PHYSICAL_APIC_ID_MASK);
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uv_apicid_hibits = apicid_mask.s1.bit_enables & UV_APICID_HIBIT_MASK;
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}
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}
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static void __init uv_stringify(int len, char *to, char *from)
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{
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/* Relies on 'to' being NULL chars so result will be NULL terminated */
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@@ -280,36 +257,25 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, char *_oem_table_id)
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/*
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* Determine UV arch type.
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* SGI: UV100/1000
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* SGI2: UV2000/3000
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* SGI3: UV300 (truncated to 4 chars because of different varieties)
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* SGI4: UV400 (truncated to 4 chars because of different varieties)
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*/
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uv_hub_info->hub_revision =
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!strncmp(oem_id, "SGI4", 4) ? UV4_HUB_REVISION_BASE :
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!strncmp(oem_id, "SGI3", 4) ? UV3_HUB_REVISION_BASE :
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!strcmp(oem_id, "SGI2") ? UV2_HUB_REVISION_BASE :
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!strcmp(oem_id, "SGI") ? UV1_HUB_REVISION_BASE : 0;
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if (uv_hub_info->hub_revision == 0)
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goto badbios;
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switch (uv_hub_info->hub_revision) {
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case UV4_HUB_REVISION_BASE:
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if (!strncmp(oem_id, "SGI4", 4)) {
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uv_hub_info->hub_revision = UV4_HUB_REVISION_BASE;
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uv_hubbed_system = 0x11;
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break;
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case UV3_HUB_REVISION_BASE:
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} else if (!strncmp(oem_id, "SGI3", 4)) {
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uv_hub_info->hub_revision = UV3_HUB_REVISION_BASE;
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uv_hubbed_system = 0x9;
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break;
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case UV2_HUB_REVISION_BASE:
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} else if (!strcmp(oem_id, "SGI2")) {
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uv_hub_info->hub_revision = UV2_HUB_REVISION_BASE;
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uv_hubbed_system = 0x5;
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break;
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case UV1_HUB_REVISION_BASE:
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uv_hubbed_system = 0x3;
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break;
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} else {
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uv_hub_info->hub_revision = 0;
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goto badbios;
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}
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pnodeid = early_get_pnodeid();
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@@ -323,14 +289,6 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, char *_oem_table_id)
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uv_system_type = UV_X2APIC;
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uv_apic = 0;
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} else if (!strcmp(oem_table_id, "UVH")) {
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/* Only UV1 systems: */
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uv_system_type = UV_NON_UNIQUE_APIC;
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x86_platform.legacy.warm_reset = 0;
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__this_cpu_write(x2apic_extra_bits, pnodeid << uvh_apicid.s.pnode_shift);
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uv_set_apicid_hibit();
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uv_apic = 1;
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} else if (!strcmp(oem_table_id, "UVL")) {
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/* Only used for very small systems: */
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uv_system_type = UV_LEGACY_APIC;
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@@ -347,7 +305,7 @@ static int __init uv_acpi_madt_oem_check(char *_oem_id, char *_oem_table_id)
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badbios:
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pr_err("UV: OEM_ID:%s OEM_TABLE_ID:%s\n", oem_id, oem_table_id);
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pr_err("Current BIOS not supported, update kernel and/or BIOS\n");
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pr_err("Current UV Type or BIOS not supported\n");
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BUG();
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}
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@@ -545,7 +503,6 @@ static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
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int pnode;
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pnode = uv_apicid_to_pnode(phys_apicid);
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phys_apicid |= uv_apicid_hibits;
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val = (1UL << UVH_IPI_INT_SEND_SHFT) |
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(phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) |
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@@ -576,7 +533,7 @@ static void uv_send_IPI_one(int cpu, int vector)
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dmode = dest_Fixed;
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val = (1UL << UVH_IPI_INT_SEND_SHFT) |
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((apicid | uv_apicid_hibits) << UVH_IPI_INT_APIC_ID_SHFT) |
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(apicid << UVH_IPI_INT_APIC_ID_SHFT) |
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(dmode << UVH_IPI_INT_DELIVERY_MODE_SHFT) |
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(vector << UVH_IPI_INT_VECTOR_SHFT);
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@@ -634,22 +591,16 @@ static void uv_init_apic_ldr(void)
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static u32 apic_uv_calc_apicid(unsigned int cpu)
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{
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return apic_default_calc_apicid(cpu) | uv_apicid_hibits;
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return apic_default_calc_apicid(cpu);
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}
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static unsigned int x2apic_get_apic_id(unsigned long x)
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static unsigned int x2apic_get_apic_id(unsigned long id)
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{
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unsigned int id;
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WARN_ON(preemptible() && num_online_cpus() > 1);
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id = x | __this_cpu_read(x2apic_extra_bits);
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return id;
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}
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static u32 set_apic_id(unsigned int id)
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{
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/* CHECKME: Do we need to mask out the xapic extra bits? */
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return id;
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}
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@@ -721,11 +672,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
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.safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
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};
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static void set_x2apic_extra_bits(int pnode)
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{
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__this_cpu_write(x2apic_extra_bits, pnode << uvh_apicid.s.pnode_shift);
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}
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#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_LENGTH 3
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#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
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@@ -920,15 +866,7 @@ static __init void map_mmioh_high(int min_pnode, int max_pnode)
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return;
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}
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if (is_uv1_hub()) {
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mmr = UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR;
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shift = UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT;
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mmioh.v = uv_read_local_mmr(mmr);
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enable = !!mmioh.s1.enable;
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base = mmioh.s1.base;
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m_io = mmioh.s1.m_io;
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n_io = mmioh.s1.n_io;
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} else if (is_uv2_hub()) {
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if (is_uv2_hub()) {
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mmr = UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR;
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shift = UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT;
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mmioh.v = uv_read_local_mmr(mmr);
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@@ -936,16 +874,15 @@ static __init void map_mmioh_high(int min_pnode, int max_pnode)
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base = mmioh.s2.base;
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m_io = mmioh.s2.m_io;
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n_io = mmioh.s2.n_io;
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} else {
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return;
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}
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if (enable) {
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max_pnode &= (1 << n_io) - 1;
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pr_info("UV: base:0x%lx shift:%d N_IO:%d M_IO:%d max_pnode:0x%x\n", base, shift, m_io, n_io, max_pnode);
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map_high("MMIOH", base, shift, m_io, max_pnode, map_uc);
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} else {
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pr_info("UV: MMIOH disabled\n");
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if (enable) {
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max_pnode &= (1 << n_io) - 1;
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pr_info("UV: base:0x%lx shift:%d N_IO:%d M_IO:%d max_pnode:0x%x\n",
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base, shift, m_io, n_io, max_pnode);
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map_high("MMIOH", base, shift, m_io, max_pnode, map_uc);
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} else {
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pr_info("UV: MMIOH disabled\n");
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}
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}
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}
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@@ -1081,9 +1018,6 @@ void uv_cpu_init(void)
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return;
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uv_hub_info->nr_online_cpus++;
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if (get_uv_system_type() == UV_NON_UNIQUE_APIC)
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set_x2apic_extra_bits(uv_hub_info->pnode);
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}
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struct mn {
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@@ -1114,9 +1048,6 @@ static void get_mn(struct mn *mnp)
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} else if (is_uv2_hub()) {
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mnp->m_val = m_n_config.s2.m_skt;
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mnp->n_lshift = mnp->m_val == 40 ? 40 : 39;
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} else if (is_uv1_hub()) {
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mnp->m_val = m_n_config.s1.m_skt;
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mnp->n_lshift = mnp->m_val;
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}
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mnp->m_shift = mnp->m_val ? 64 - mnp->m_val : 0;
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}
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@@ -1318,7 +1249,7 @@ static void __init build_socket_tables(void)
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size_t bytes;
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if (!gre) {
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if (is_uv1_hub() || is_uv2_hub() || is_uv3_hub()) {
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if (is_uv2_hub() || is_uv3_hub()) {
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pr_info("UV: No UVsystab socket table, ignoring\n");
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return;
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}
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@@ -1500,8 +1431,7 @@ static void __init uv_system_init_hub(void)
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unsigned short min_pnode = 9999, max_pnode = 0;
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char *hub = is_uv4_hub() ? "UV400" :
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is_uv3_hub() ? "UV300" :
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is_uv2_hub() ? "UV2000/3000" :
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is_uv1_hub() ? "UV100/1000" : NULL;
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is_uv2_hub() ? "UV2000/3000" : NULL;
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if (!hub) {
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pr_err("UV: Unknown/unsupported UV hub\n");
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@@ -170,15 +170,6 @@ setup_efi_state(struct boot_params *params, unsigned long params_load_addr,
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if (!current_ei->efi_memmap_size)
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return 0;
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/*
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* If 1:1 mapping is not enabled, second kernel can not setup EFI
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* and use EFI run time services. User space will have to pass
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* acpi_rsdp=<addr> on kernel command line to make second kernel boot
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* without efi.
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*/
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if (efi_have_uv1_memmap())
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return 0;
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params->secure_boot = boot_params.secure_boot;
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ei->efi_loader_signature = current_ei->efi_loader_signature;
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ei->efi_systab = current_ei->efi_systab;
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