Merge remote-tracking branches 'spi/fix/atmel', 'spi/fix/bcm2835', 'spi/fix/doc', 'spi/fix/mediatek', 'spi/fix/meson', 'spi/fix/mtk' and 'spi/fix/pxa2xx' into spi-linus
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@@ -15,17 +15,18 @@ Required properties:
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- interrupts: Should contain spi interrupt
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- clocks: phandles to input clocks.
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The first should be <&topckgen CLK_TOP_SPI_SEL>.
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The second should be one of the following.
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The first should be one of the following. It's PLL.
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- <&clk26m>: specify parent clock 26MHZ.
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- <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
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It's the default one.
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- <&topckgen CLK_TOP_SYSPLL4_D2>: specify parent clock 78MHZ.
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- <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
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- <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
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The second should be <&topckgen CLK_TOP_SPI_SEL>. It's clock mux.
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The third is <&pericfg CLK_PERI_SPI0>. It's clock gate.
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- clock-names: shall be "spi-clk" for the controller clock, and
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"parent-clk" for the parent clock.
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- clock-names: shall be "parent-clk" for the parent clock, "sel-clk" for the
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muxes clock, and "spi-clk" for the clock gate.
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Optional properties:
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- mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
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@@ -44,8 +45,11 @@ spi: spi@1100a000 {
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#size-cells = <0>;
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reg = <0 0x1100a000 0 0x1000>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
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clock-names = "spi-clk", "parent-clk";
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clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
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<&topckgen CLK_TOP_SPI_SEL>,
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<&pericfg CLK_PERI_SPI0>;
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clock-names = "parent-clk", "sel-clk", "spi-clk";
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mediatek,pad-select = <0>;
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status = "disabled";
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};
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