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MIPS: Add and use watch register field definitions

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The files watch.c and ptrace.c contain various magic masks for
WatchLo/WatchHi register fields. Add some definitions to mipsregs.h for
these registers and make use of them in both watch.c and ptrace.c,
hopefully making them more readable.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12729/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
James Hogan
2016-03-01 22:19:39 +00:00
committed by Ralf Baechle
parent e233c73378
commit 50af501cd8
3 changed files with 63 additions and 36 deletions
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18
arch/mips/include/asm/mipsregs.h
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@@ -648,6 +648,24 @@
/* FTLB probability bits for R6 */
#define MIPS_CONF7_FTLBP_SHIFT (18)
/* WatchLo* register definitions */
#define MIPS_WATCHLO_IRW (_ULCAST_(0x7) << 0)
/* WatchHi* register definitions */
#define MIPS_WATCHHI_M (_ULCAST_(1) << 31)
#define MIPS_WATCHHI_G (_ULCAST_(1) << 30)
#define MIPS_WATCHHI_WM (_ULCAST_(0x3) << 28)
#define MIPS_WATCHHI_WM_R_RVA (_ULCAST_(0) << 28)
#define MIPS_WATCHHI_WM_R_GPA (_ULCAST_(1) << 28)
#define MIPS_WATCHHI_WM_G_GVA (_ULCAST_(2) << 28)
#define MIPS_WATCHHI_EAS (_ULCAST_(0x3) << 24)
#define MIPS_WATCHHI_ASID (_ULCAST_(0xff) << 16)
#define MIPS_WATCHHI_MASK (_ULCAST_(0x1ff) << 3)
#define MIPS_WATCHHI_I (_ULCAST_(1) << 2)
#define MIPS_WATCHHI_R (_ULCAST_(1) << 1)
#define MIPS_WATCHHI_W (_ULCAST_(1) << 0)
#define MIPS_WATCHHI_IRW (_ULCAST_(0x7) << 0)
/* MAAR bit definitions */
#define MIPS_MAAR_ADDR ((BIT_ULL(BITS_PER_LONG - 12) - 1) << 12)
#define MIPS_MAAR_ADDR_SHIFT 12