Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson: "A smallish number of general cleanup commits this release cycle. Some of these are minor tweaks: - shmobile change of binding for their GIC (using arm,pl390 now) - ARCH_RENESAS introduction - Misc other renesas updates There's also a couple of treewide commits from Masahiro Yamada cleaning up const/__initconst for SMP operation structs and a switch to using "depends on" instead of if-constructs on most of the Kconfig platform targets" * tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: staging: board: armadillo800eva: Use "arm,pl390" staging: board: kzm9d: Use "arm,pl390" ARM: shmobile: r8a7778 dtsi: Use "arm,pl390" for GIC ARM: shmobile: emev2 dtsi: Use "arm,pl390" for GIC ARM: shmobile: r8a7740 dtsi: Use "arm,pl390" for GIC ARM: shmobile: r7s72100 dtsi: Use "arm,pl390" for GIC ARM: use "depends on" for SoC configs instead of "if" after prompt ARM/clocksource: use automatic DT probing for ux500 PRCMU ARM: use const and __initconst for smp_operations ARM: hisi: do not export smp_operations structures ARM: mvebu: remove unused mach/gpio.h ARM: shmobile: Remove legacy mach/irqs.h ARM: shmobile: Introduce ARCH_RENESAS MAINTAINERS: Remove link to oss.renesas.com which is closed
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@@ -12,8 +12,9 @@
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* power domain. We use the Timer 4 for our always-on clock
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* source on DB8500.
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*/
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/clockchips.h>
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#include <linux/clksrc-dbx500-prcmu.h>
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#include <linux/sched_clock.h>
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#define RATE_32K 32768
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@@ -63,9 +64,9 @@ static u64 notrace dbx500_prcmu_sched_clock_read(void)
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#endif
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void __init clksrc_dbx500_prcmu_init(void __iomem *base)
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static void __init clksrc_dbx500_prcmu_init(struct device_node *node)
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{
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clksrc_dbx500_timer_base = base;
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clksrc_dbx500_timer_base = of_iomap(node, 0);
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/*
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* The A9 sub system expects the timer to be configured as
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@@ -85,3 +86,5 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base)
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#endif
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clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
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}
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CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
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clksrc_dbx500_prcmu_init);
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