Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson: "New or improved SoC support: - add support for Atmel's SAMA5D2 SoC - add support for Freescale i.MX6UL - improved support for TI's DM814x platform - misc fixes and improvements for RockChip platforms - Marvell MVEBU suspend/resume support A few driver changes that ideally would belong in the drivers branch are also here (acked by appropriate maintainers): - power key input driver for Freescale platforms (svns) - RTC driver updates for Freescale platforms (svns/mxc) - clk fixes for TI DM814/816X + a bunch of other changes for various platforms" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits) ARM: rockchip: pm: Fix PTR_ERR() argument ARM: imx: mach-imx6ul: Fix allmodconfig build clk: ti: fix for definition movement ARM: uniphier: drop v7_invalidate_l1 call at secondary entry memory: kill off set_irq_flags usage rtc: snvs: select option REGMAP_MMIO ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE ARM: BCM: Enable ARM erratum 798181 for BRCMSTB ARM: OMAP2+: Fix power domain operations regression caused by 81xx ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend ARM: rockchip: set correct stabilization thresholds in suspend ARM: rockchip: rename osc_switch_to_32k variable ARM: imx6ul: add fec MAC refrence clock and phy fixup init ARM: imx6ul: add fec bits to GPR syscon definition rtc: mxc: add support of device tree dt-binding: document the binding for mxc rtc rtc: mxc: use a second rtc clock ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback soc: mediatek: Fix SCPSYS compilation ARM: at91/soc: add basic support for new sama5d2 SoC ...
This commit is contained in:
Linus Torvalds
@@ -13,6 +13,7 @@ config SOC_ZX296702
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select ARM_GLOBAL_TIMER
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select PM_GENERIC_DOMAINS
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help
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Support for ZTE ZX296702 SoC which is a dual core CortexA9MP
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endif
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@@ -1,2 +1,2 @@
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obj-$(CONFIG_SOC_ZX296702) += zx296702.o
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obj-$(CONFIG_SOC_ZX296702) += zx296702.o zx296702-pm-domain.o
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obj-$(CONFIG_SMP) += headsmp.o platsmp.o
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202
arch/arm/mach-zx/zx296702-pm-domain.c
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202
arch/arm/mach-zx/zx296702-pm-domain.c
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@@ -0,0 +1,202 @@
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/*
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* Copyright (C) 2015 Linaro Ltd.
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*
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* Author: Jun Nie <jun.nie@linaro.org>
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/slab.h>
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#define PCU_DM_CLKEN 0x18
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#define PCU_DM_RSTEN 0x1C
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#define PCU_DM_ISOEN 0x20
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#define PCU_DM_PWRDN 0x24
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#define PCU_DM_ACK_SYNC 0x28
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enum {
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PCU_DM_NEON0 = 0,
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PCU_DM_NEON1,
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PCU_DM_GPU,
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PCU_DM_DECPPU,
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PCU_DM_VOU,
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PCU_DM_R2D,
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PCU_DM_TOP,
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};
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static void __iomem *pcubase;
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struct zx_pm_domain {
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struct generic_pm_domain dm;
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unsigned int bit;
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};
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static int normal_power_off(struct generic_pm_domain *domain)
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{
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struct zx_pm_domain *zpd = (struct zx_pm_domain *)domain;
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unsigned long loop = 1000;
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u32 tmp;
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tmp = readl_relaxed(pcubase + PCU_DM_CLKEN);
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tmp &= ~BIT(zpd->bit);
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writel_relaxed(tmp, pcubase + PCU_DM_CLKEN);
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udelay(5);
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tmp = readl_relaxed(pcubase + PCU_DM_ISOEN);
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tmp &= ~BIT(zpd->bit);
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writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_ISOEN);
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udelay(5);
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tmp = readl_relaxed(pcubase + PCU_DM_RSTEN);
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tmp &= ~BIT(zpd->bit);
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writel_relaxed(tmp, pcubase + PCU_DM_RSTEN);
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udelay(5);
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tmp = readl_relaxed(pcubase + PCU_DM_PWRDN);
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tmp &= ~BIT(zpd->bit);
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writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_PWRDN);
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do {
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tmp = readl_relaxed(pcubase + PCU_DM_ACK_SYNC) & BIT(zpd->bit);
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} while (--loop && !tmp);
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if (!loop) {
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pr_err("Error: %s %s fail\n", __func__, domain->name);
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return -EIO;
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}
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return 0;
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}
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static int normal_power_on(struct generic_pm_domain *domain)
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{
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struct zx_pm_domain *zpd = (struct zx_pm_domain *)domain;
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unsigned long loop = 10000;
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u32 tmp;
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tmp = readl_relaxed(pcubase + PCU_DM_PWRDN);
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tmp &= ~BIT(zpd->bit);
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writel_relaxed(tmp, pcubase + PCU_DM_PWRDN);
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do {
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tmp = readl_relaxed(pcubase + PCU_DM_ACK_SYNC) & BIT(zpd->bit);
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} while (--loop && tmp);
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if (!loop) {
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pr_err("Error: %s %s fail\n", __func__, domain->name);
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return -EIO;
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}
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tmp = readl_relaxed(pcubase + PCU_DM_RSTEN);
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tmp &= ~BIT(zpd->bit);
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writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_RSTEN);
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udelay(5);
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tmp = readl_relaxed(pcubase + PCU_DM_ISOEN);
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tmp &= ~BIT(zpd->bit);
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writel_relaxed(tmp, pcubase + PCU_DM_ISOEN);
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udelay(5);
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tmp = readl_relaxed(pcubase + PCU_DM_CLKEN);
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tmp &= ~BIT(zpd->bit);
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writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_CLKEN);
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udelay(5);
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return 0;
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}
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static struct zx_pm_domain gpu_domain = {
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.dm = {
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.name = "gpu_domain",
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.power_off = normal_power_off,
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.power_on = normal_power_on,
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},
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.bit = PCU_DM_GPU,
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};
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static struct zx_pm_domain decppu_domain = {
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.dm = {
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.name = "decppu_domain",
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.power_off = normal_power_off,
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.power_on = normal_power_on,
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},
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.bit = PCU_DM_DECPPU,
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};
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static struct zx_pm_domain vou_domain = {
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.dm = {
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.name = "vou_domain",
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.power_off = normal_power_off,
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.power_on = normal_power_on,
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},
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.bit = PCU_DM_VOU,
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};
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static struct zx_pm_domain r2d_domain = {
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.dm = {
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.name = "r2d_domain",
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.power_off = normal_power_off,
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.power_on = normal_power_on,
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},
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.bit = PCU_DM_R2D,
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};
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static struct generic_pm_domain *zx296702_pm_domains[] = {
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&vou_domain.dm,
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&gpu_domain.dm,
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&decppu_domain.dm,
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&r2d_domain.dm,
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};
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static int zx296702_pd_probe(struct platform_device *pdev)
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{
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struct genpd_onecell_data *genpd_data;
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struct resource *res;
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int i;
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genpd_data = devm_kzalloc(&pdev->dev, sizeof(*genpd_data), GFP_KERNEL);
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if (!genpd_data)
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return -ENOMEM;
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genpd_data->domains = zx296702_pm_domains;
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genpd_data->num_domains = ARRAY_SIZE(zx296702_pm_domains);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "no memory resource defined\n");
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return -ENODEV;
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}
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pcubase = devm_ioremap_resource(&pdev->dev, res);
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if (!pcubase) {
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dev_err(&pdev->dev, "ioremap fail.\n");
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return -EIO;
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}
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for (i = 0; i < ARRAY_SIZE(zx296702_pm_domains); ++i)
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pm_genpd_init(zx296702_pm_domains[i], NULL, false);
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of_genpd_add_provider_onecell(pdev->dev.of_node, genpd_data);
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return 0;
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}
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static const struct of_device_id zx296702_pm_domain_matches[] __initconst = {
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{ .compatible = "zte,zx296702-pcu", },
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{ },
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};
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static struct platform_driver zx296702_pd_driver __initdata = {
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.driver = {
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.name = "zx-powerdomain",
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.owner = THIS_MODULE,
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.of_match_table = zx296702_pm_domain_matches,
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},
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.probe = zx296702_pd_probe,
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};
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static int __init zx296702_pd_init(void)
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{
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return platform_driver_register(&zx296702_pd_driver);
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}
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subsys_initcall(zx296702_pd_init);
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